forked from Minki/linux
ath9k: Cleanup __ath9k_hw_init()
* Move initialization of config variables to ath9k_hw_init_config(). * Move initialization of defaults to ath9k_hw_init_defaults(). Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -346,6 +346,8 @@ static bool ath9k_hw_chip_test(struct ath_hw *ah)
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static void ath9k_hw_init_config(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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ah->config.dma_beacon_response_time = 1;
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ah->config.sw_beacon_response_time = 6;
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ah->config.ack_6mb = 0x0;
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@ -372,6 +374,24 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
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*/
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if (num_possible_cpus() > 1)
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ah->config.serialize_regmode = SER_REG_MODE_AUTO;
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if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_AUTO) {
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if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI ||
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((AR_SREV_9160(ah) || AR_SREV_9280(ah) || AR_SREV_9287(ah)) &&
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!ah->is_pciexpress)) {
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ah->config.serialize_regmode = SER_REG_MODE_ON;
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} else {
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ah->config.serialize_regmode = SER_REG_MODE_OFF;
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}
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}
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ath_dbg(common, RESET, "serialize_regmode is %d\n",
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ah->config.serialize_regmode);
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if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
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ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD >> 1;
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else
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ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD;
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}
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static void ath9k_hw_init_defaults(struct ath_hw *ah)
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@ -384,15 +404,24 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
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ah->hw_version.magic = AR5416_MAGIC;
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ah->hw_version.subvendorid = 0;
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ah->sta_id1_defaults =
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AR_STA_ID1_CRPT_MIC_ENABLE |
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AR_STA_ID1_MCAST_KSRCH;
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ah->sta_id1_defaults = AR_STA_ID1_CRPT_MIC_ENABLE |
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AR_STA_ID1_MCAST_KSRCH;
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if (AR_SREV_9100(ah))
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ah->sta_id1_defaults |= AR_STA_ID1_AR9100_BA_FIX;
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ah->slottime = ATH9K_SLOT_TIME_9;
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ah->globaltxtimeout = (u32) -1;
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ah->power_mode = ATH9K_PM_UNDEFINED;
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ah->htc_reset_init = true;
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ah->ani_function = ATH9K_ANI_ALL;
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if (!AR_SREV_9300_20_OR_LATER(ah))
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ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
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if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
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ah->tx_trig_level = (AR_FTRIG_256B >> AR_FTRIG_S);
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else
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ah->tx_trig_level = (AR_FTRIG_512B >> AR_FTRIG_S);
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}
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static int ath9k_hw_init_macaddr(struct ath_hw *ah)
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@ -531,26 +560,6 @@ static int __ath9k_hw_init(struct ath_hw *ah)
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return -EIO;
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}
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if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_AUTO) {
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if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI ||
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((AR_SREV_9160(ah) || AR_SREV_9280(ah) || AR_SREV_9287(ah)) &&
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!ah->is_pciexpress)) {
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ah->config.serialize_regmode =
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SER_REG_MODE_ON;
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} else {
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ah->config.serialize_regmode =
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SER_REG_MODE_OFF;
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}
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}
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ath_dbg(common, RESET, "serialize_regmode is %d\n",
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ah->config.serialize_regmode);
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if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
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ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD >> 1;
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else
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ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD;
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if (AR_SREV_9271(ah) || AR_SREV_9100(ah) || AR_SREV_9340(ah) ||
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AR_SREV_9330(ah) || AR_SREV_9550(ah))
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ah->is_pciexpress = false;
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@ -558,10 +567,6 @@ static int __ath9k_hw_init(struct ath_hw *ah)
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ah->hw_version.phyRev = REG_READ(ah, AR_PHY_CHIP_ID);
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ath9k_hw_init_cal_settings(ah);
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ah->ani_function = ATH9K_ANI_ALL;
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if (!AR_SREV_9300_20_OR_LATER(ah))
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ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
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if (!ah->is_pciexpress)
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ath9k_hw_disablepcie(ah);
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@ -580,11 +585,6 @@ static int __ath9k_hw_init(struct ath_hw *ah)
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return r;
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}
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if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
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ah->tx_trig_level = (AR_FTRIG_256B >> AR_FTRIG_S);
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else
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ah->tx_trig_level = (AR_FTRIG_512B >> AR_FTRIG_S);
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ath9k_hw_init_hang_checks(ah);
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common->state = ATH_HW_INITIALIZED;
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