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ARM: dts: imx27-phytec-phycore-som: Add pinctrl for CSPI1 and GPIOs used on module

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Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Alexander Shiyan 2013-12-07 12:26:35 +04:00 committed by Shawn Guo
parent 40dde68196
commit f4bdf21564
1 changed files with 12 additions and 0 deletions
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12
arch/arm/boot/dts/imx27-phytec-phycore-som.dts
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@ -51,6 +51,8 @@
};
&cspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cspi1>;
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
status = "okay";
@ -181,6 +183,16 @@
&iomuxc {
imx27_phycore_som {
pinctrl_cspi1: cspi1grp {
fsl,pins = <
MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* SPI1 CS0 */
MX27_PAD_USB_PWR__GPIO2_23 0x0 /* PMIC IRQ */
>;
};
pinctrl_fec1: fec1grp {
fsl,pins = <
MX27_PAD_SD3_CMD__FEC_TXD0 0x0