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tg3: Fix disappearing 57780 devices

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Under certain power saving conditions, 57780 asic rev devices might
disappear from the system.  The fix is to disallow the PCIe PLL from
powering down.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson 2009-11-02 14:24:02 +00:00 committed by David S. Miller
parent 92c6b8d16a
commit f40386c845
2 changed files with 2 additions and 23 deletions
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24
drivers/net/tg3.c
View File

@ -3243,15 +3243,6 @@ relink:
pci_write_config_word(tp->pdev, pci_write_config_word(tp->pdev,
tp->pcie_cap + PCI_EXP_LNKCTL, tp->pcie_cap + PCI_EXP_LNKCTL,
newlnkctl); newlnkctl);
} else if (tp->tg3_flags3 & TG3_FLG3_TOGGLE_10_100_L1PLLPD) {
u32 newreg, oldreg = tr32(TG3_PCIE_LNKCTL);
if (tp->link_config.active_speed == SPEED_100 ||
tp->link_config.active_speed == SPEED_10)
newreg = oldreg & ~TG3_PCIE_LNKCTL_L1_PLL_PD_EN;
else
newreg = oldreg | TG3_PCIE_LNKCTL_L1_PLL_PD_EN;
if (newreg != oldreg)
tw32(TG3_PCIE_LNKCTL, newreg);
} }
if (current_link_up != netif_carrier_ok(tp->dev)) { if (current_link_up != netif_carrier_ok(tp->dev)) {
@ -7180,15 +7171,9 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tw32(TG3_PCIE_EIDLE_DELAY, val | TG3_PCIE_EIDLE_DELAY_13_CLKS); tw32(TG3_PCIE_EIDLE_DELAY, val | TG3_PCIE_EIDLE_DELAY_13_CLKS);
tw32(TG3_CORR_ERR_STAT, TG3_CORR_ERR_STAT_CLEAR); tw32(TG3_CORR_ERR_STAT, TG3_CORR_ERR_STAT_CLEAR);
}
if (tp->tg3_flags3 & TG3_FLG3_TOGGLE_10_100_L1PLLPD) { val = tr32(TG3_PCIE_LNKCTL) & ~TG3_PCIE_LNKCTL_L1_PLL_PD_EN;
val = tr32(TG3_PCIE_LNKCTL); tw32(TG3_PCIE_LNKCTL, val | TG3_PCIE_LNKCTL_L1_PLL_PD_DIS);
if (tp->tg3_flags3 & TG3_FLG3_CLKREQ_BUG)
val |= TG3_PCIE_LNKCTL_L1_PLL_PD_DIS;
else
val &= ~TG3_PCIE_LNKCTL_L1_PLL_PD_DIS;
tw32(TG3_PCIE_LNKCTL, val);
} }
/* This works around an issue with Athlon chipsets on /* This works around an issue with Athlon chipsets on
@ -12951,11 +12936,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780)
tp->tg3_flags3 |= TG3_FLG3_USE_PHYLIB; tp->tg3_flags3 |= TG3_FLG3_USE_PHYLIB;
if ((tp->pci_chip_rev_id == CHIPREV_ID_57780_A1 &&
tr32(RCVLPC_STATS_ENABLE) & RCVLPC_STATSENAB_ASF_FIX) ||
tp->pci_chip_rev_id == CHIPREV_ID_57780_A0)
tp->tg3_flags3 |= TG3_FLG3_TOGGLE_10_100_L1PLLPD;
err = tg3_mdio_init(tp); err = tg3_mdio_init(tp);
if (err) if (err)
return err; return err;

1
drivers/net/tg3.h
View File

@ -2756,7 +2756,6 @@ struct tg3 {
#define TG3_FLG3_PHY_ENABLE_APD 0x00001000 #define TG3_FLG3_PHY_ENABLE_APD 0x00001000
#define TG3_FLG3_5755_PLUS 0x00002000 #define TG3_FLG3_5755_PLUS 0x00002000
#define TG3_FLG3_NO_NVRAM 0x00004000 #define TG3_FLG3_NO_NVRAM 0x00004000
#define TG3_FLG3_TOGGLE_10_100_L1PLLPD 0x00008000
#define TG3_FLG3_PHY_IS_FET 0x00010000 #define TG3_FLG3_PHY_IS_FET 0x00010000
#define TG3_FLG3_ENABLE_RSS 0x00020000 #define TG3_FLG3_ENABLE_RSS 0x00020000
#define TG3_FLG3_4G_DMA_BNDRY_BUG 0x00080000 #define TG3_FLG3_4G_DMA_BNDRY_BUG 0x00080000