staging: olpc_dcon: Change bitshifts to BIT macro
checkpatch.pl reported the bitshifts (1<<x) as a style violation, so change them to the BIT macro (BIT(x)). Signed-off-by: Zebulon McCorkle <zebmccorkle@zeb.fun> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -10,18 +10,18 @@
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#define DCON_REG_ID 0
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#define DCON_REG_ID 0
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#define DCON_REG_MODE 1
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#define DCON_REG_MODE 1
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#define MODE_PASSTHRU (1<<0)
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#define MODE_PASSTHRU BIT(0)
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#define MODE_SLEEP (1<<1)
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#define MODE_SLEEP BIT(1)
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#define MODE_SLEEP_AUTO (1<<2)
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#define MODE_SLEEP_AUTO BIT(2)
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#define MODE_BL_ENABLE (1<<3)
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#define MODE_BL_ENABLE BIT(3)
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#define MODE_BLANK (1<<4)
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#define MODE_BLANK BIT(4)
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#define MODE_CSWIZZLE (1<<5)
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#define MODE_CSWIZZLE BIT(5)
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#define MODE_COL_AA (1<<6)
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#define MODE_COL_AA BIT(6)
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#define MODE_MONO_LUMA (1<<7)
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#define MODE_MONO_LUMA BIT(7)
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#define MODE_SCAN_INT (1<<8)
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#define MODE_SCAN_INT BIT(8)
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#define MODE_CLOCKDIV (1<<9)
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#define MODE_CLOCKDIV BIT(9)
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#define MODE_DEBUG (1<<14)
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#define MODE_DEBUG BIT(14)
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#define MODE_SELFTEST (1<<15)
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#define MODE_SELFTEST BIT(15)
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#define DCON_REG_HRES 0x2
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#define DCON_REG_HRES 0x2
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#define DCON_REG_HTOTAL 0x3
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#define DCON_REG_HTOTAL 0x3
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@ -36,11 +36,11 @@
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#define DCON_REG_MEM_OPT_B 0x42
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#define DCON_REG_MEM_OPT_B 0x42
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/* Load Delay Locked Loop (DLL) settings for clock delay */
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/* Load Delay Locked Loop (DLL) settings for clock delay */
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#define MEM_DLL_CLOCK_DELAY (1<<0)
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#define MEM_DLL_CLOCK_DELAY BIT(0)
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/* Memory controller power down function */
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/* Memory controller power down function */
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#define MEM_POWER_DOWN (1<<8)
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#define MEM_POWER_DOWN BIT(8)
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/* Memory controller software reset */
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/* Memory controller software reset */
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#define MEM_SOFT_RESET (1<<0)
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#define MEM_SOFT_RESET BIT(0)
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/* Status values */
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/* Status values */
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