can: flexcan: rename feature into quirks
This patch renames the "features" member of struct flexcan_devtype_data to "quirks". The corresponding defines are renamed too, to reflect what they actually do. FLEXCAN_HAS_V10_FEATURES -> FLEXCAN_QUIRK_DISABLE_RXFG FLEXCAN_HAS_BROKEN_ERR_STATE -> FLEXCAN_QUIRK_BROKEN_ERR_STATE FLEXCAN_HAS_MECR_FEATURES -> FLEXCAN_QUIRK_DISABLE_MECR Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -187,9 +187,9 @@
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*
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* Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected.
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*/
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#define FLEXCAN_HAS_V10_FEATURES BIT(1) /* For core version >= 10 */
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#define FLEXCAN_HAS_BROKEN_ERR_STATE BIT(2) /* [TR]WRN_INT not connected */
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#define FLEXCAN_HAS_MECR_FEATURES BIT(3) /* Memory error detection */
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#define FLEXCAN_QUIRK_BROKEN_ERR_STATE BIT(1) /* [TR]WRN_INT not connected */
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#define FLEXCAN_QUIRK_DISABLE_RXFG BIT(2) /* Disable RX FIFO Global mask */
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#define FLEXCAN_QUIRK_DISABLE_MECR BIT(3) /* Disble Memory error detection */
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/* Structure of the message buffer */
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struct flexcan_mb {
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@ -244,7 +244,7 @@ struct flexcan_regs {
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};
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struct flexcan_devtype_data {
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u32 features; /* hardware controller features */
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u32 quirks; /* quirks needed for different IP cores */
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};
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struct flexcan_priv {
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@ -263,17 +263,17 @@ struct flexcan_priv {
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};
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static struct flexcan_devtype_data fsl_p1010_devtype_data = {
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.features = FLEXCAN_HAS_BROKEN_ERR_STATE,
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.quirks = FLEXCAN_QUIRK_BROKEN_ERR_STATE,
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};
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static struct flexcan_devtype_data fsl_imx28_devtype_data;
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static struct flexcan_devtype_data fsl_imx6q_devtype_data = {
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.features = FLEXCAN_HAS_V10_FEATURES,
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.quirks = FLEXCAN_QUIRK_DISABLE_RXFG,
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};
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static struct flexcan_devtype_data fsl_vf610_devtype_data = {
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.features = FLEXCAN_HAS_V10_FEATURES | FLEXCAN_HAS_MECR_FEATURES,
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.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_DISABLE_MECR,
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};
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static const struct can_bittiming_const flexcan_bittiming_const = {
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@ -870,7 +870,7 @@ static int flexcan_chip_start(struct net_device *dev)
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* on most Flexcan cores, too. Otherwise we don't get
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* any error warning or passive interrupts.
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*/
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if (priv->devtype_data->features & FLEXCAN_HAS_BROKEN_ERR_STATE ||
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_BROKEN_ERR_STATE ||
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priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
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reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;
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else
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@ -900,7 +900,7 @@ static int flexcan_chip_start(struct net_device *dev)
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flexcan_write(0x0, ®s->rx14mask);
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flexcan_write(0x0, ®s->rx15mask);
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if (priv->devtype_data->features & FLEXCAN_HAS_V10_FEATURES)
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_DISABLE_RXFG)
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flexcan_write(0x0, ®s->rxfgmask);
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/* On Vybrid, disable memory error detection interrupts
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@ -909,7 +909,7 @@ static int flexcan_chip_start(struct net_device *dev)
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* false positive memory errors and put the device in
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* freeze mode.
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*/
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if (priv->devtype_data->features & FLEXCAN_HAS_MECR_FEATURES) {
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_DISABLE_MECR) {
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/* Follow the protocol as described in "Detection
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* and Correction of Memory Errors" to write to
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* MECR register
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