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ath9k: clean up hardware code for beacon handling

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The registers TBTT_TIMER ,DMA_BEACON_ALERT ,NEXT_SWBA are need to be
configured only for AP and IBSS mode.

SWBA register is used for generating software interrupts so that beacon
frames will be created by the software.DMA beacon alert register is
to indicate the hardware to DMA the contents of beacon buffer to PCU buffer
and TBTT to start transmitting the packet buffer to the base band.
Clearly these things are not needed for station/monitor mode so
remove configuring them.

Cc: doug dahlby <ddahlby@atheros.com>
Signed-off-by: Mohammed Shafi Shajakhan <mshajakhan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Mohammed Shafi Shajakhan 2010-12-09 21:48:54 +05:30 committed by John W. Linville
parent 01123e2331
commit f33fdcf1b3
1 changed files with 0 additions and 14 deletions
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14
drivers/net/wireless/ath/ath9k/hw.c
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@ -1632,12 +1632,6 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
ENABLE_REGWRITE_BUFFER(ah);
switch (ah->opmode) {
case NL80211_IFTYPE_STATION:
REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon));
REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff);
REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff);
flags |= AR_TBTT_TIMER_EN;
break;
case NL80211_IFTYPE_ADHOC:
case NL80211_IFTYPE_MESH_POINT:
REG_SET_BIT(ah, AR_TXCFG,
@ -1661,14 +1655,6 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN;
break;
default:
if (ah->is_monitoring) {
REG_WRITE(ah, AR_NEXT_TBTT_TIMER,
TU_TO_USEC(next_beacon));
REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff);
REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff);
flags |= AR_TBTT_TIMER_EN;
break;
}
ath_dbg(ath9k_hw_common(ah), ATH_DBG_BEACON,
"%s: unsupported opmode: %d\n",
__func__, ah->opmode);