forked from Minki/linux
qed: Update qed_mfw_hsi.h for FW ver 8.59.1.0
The qed_mfw_hsi.h contains HSI (Hardware Software Interface) changes related to management firmware. It has been updated to support new FW version 8.59.1.0 with below changes. - New defines for VF bitmap. - fec_mode and extended_speed defines updated in struct eth_phy_cfg. - Updated structutres lldp_system_tlvs_buffer_s, public_global, public_port, public_func, drv_union_data, public_drv_mb with all dependent new structures. - Updates in NVM related structures and defines. - Msg defines are added in enum drv_msg_code and fw_msg_code. - Updated/added new defines. This patch also fixes the existing checkpatch warnings and few important checks. Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: Omkar Kulkarni <okulkarni@marvell.com> Signed-off-by: Shai Malin <smalin@marvell.com> Signed-off-by: Prabhakar Kushwaha <pkushwaha@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -99,10 +99,6 @@ static const u32 qed_mfw_ext_10g[] __initconst = {
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ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT,
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};
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static const u32 qed_mfw_ext_20g[] __initconst = {
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ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
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};
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static const u32 qed_mfw_ext_25g[] __initconst = {
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ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
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ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
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@ -148,7 +144,6 @@ static const u32 qed_mfw_ext_100g_base_r4[] __initconst = {
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static struct qed_mfw_speed_map qed_mfw_ext_maps[] __ro_after_init = {
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QED_MFW_SPEED_MAP(ETH_EXT_ADV_SPEED_1G, qed_mfw_ext_1g),
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QED_MFW_SPEED_MAP(ETH_EXT_ADV_SPEED_10G, qed_mfw_ext_10g),
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QED_MFW_SPEED_MAP(ETH_EXT_ADV_SPEED_20G, qed_mfw_ext_20g),
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QED_MFW_SPEED_MAP(ETH_EXT_ADV_SPEED_25G, qed_mfw_ext_25g),
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QED_MFW_SPEED_MAP(ETH_EXT_ADV_SPEED_40G, qed_mfw_ext_40g),
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QED_MFW_SPEED_MAP(ETH_EXT_ADV_SPEED_50G_BASE_R,
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@ -547,7 +542,7 @@ static struct qed_dev *qed_probe(struct pci_dev *pdev,
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goto err2;
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}
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DP_INFO(cdev, "qed_probe completed successfully\n");
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DP_INFO(cdev, "%s completed successfully\n", __func__);
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return cdev;
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@ -980,7 +975,7 @@ static int qed_slowpath_setup_int(struct qed_dev *cdev,
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rc = qed_set_int_mode(cdev, false);
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if (rc) {
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DP_ERR(cdev, "qed_slowpath_setup_int ERR\n");
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DP_ERR(cdev, "%s ERR\n", __func__);
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return rc;
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}
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@ -1161,6 +1156,7 @@ static int qed_slowpath_delayed_work(struct qed_hwfn *hwfn,
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/* Memory barrier for setting atomic bit */
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smp_mb__before_atomic();
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set_bit(wq_flag, &hwfn->slowpath_task_flags);
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/* Memory barrier after setting atomic bit */
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smp_mb__after_atomic();
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queue_delayed_work(hwfn->slowpath_wq, &hwfn->slowpath_task, delay);
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@ -1381,7 +1377,7 @@ static int qed_slowpath_start(struct qed_dev *cdev,
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(params->drv_minor << 16) |
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(params->drv_rev << 8) |
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(params->drv_eng);
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strlcpy(drv_version.name, params->name,
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strscpy(drv_version.name, params->name,
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MCP_DRV_VER_STR_SIZE - 4);
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rc = qed_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
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&drv_version);
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@ -3078,8 +3074,10 @@ int qed_mfw_tlv_req(struct qed_hwfn *hwfn)
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DP_VERBOSE(hwfn->cdev, NETIF_MSG_DRV,
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"Scheduling slowpath task [Flag: %d]\n",
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QED_SLOWPATH_MFW_TLV_REQ);
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/* Memory barrier for setting atomic bit */
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smp_mb__before_atomic();
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set_bit(QED_SLOWPATH_MFW_TLV_REQ, &hwfn->slowpath_task_flags);
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/* Memory barrier after setting atomic bit */
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smp_mb__after_atomic();
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queue_delayed_work(hwfn->slowpath_wq, &hwfn->slowpath_task, 0);
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@ -1527,15 +1527,13 @@ int qed_mcp_set_link(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_up)
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FW_MB_PARAM_FEATURE_SUPPORT_EXT_SPEED_FEC_CONTROL) {
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ext_speed = 0;
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if (params->ext_speed.autoneg)
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ext_speed |= ETH_EXT_SPEED_AN;
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ext_speed |= ETH_EXT_SPEED_NONE;
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val = params->ext_speed.forced_speed;
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if (val & QED_EXT_SPEED_1G)
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ext_speed |= ETH_EXT_SPEED_1G;
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if (val & QED_EXT_SPEED_10G)
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ext_speed |= ETH_EXT_SPEED_10G;
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if (val & QED_EXT_SPEED_20G)
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ext_speed |= ETH_EXT_SPEED_20G;
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if (val & QED_EXT_SPEED_25G)
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ext_speed |= ETH_EXT_SPEED_25G;
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if (val & QED_EXT_SPEED_40G)
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@ -1561,8 +1559,6 @@ int qed_mcp_set_link(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_up)
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ext_speed |= ETH_EXT_ADV_SPEED_1G;
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if (val & QED_EXT_SPEED_MASK_10G)
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ext_speed |= ETH_EXT_ADV_SPEED_10G;
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if (val & QED_EXT_SPEED_MASK_20G)
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ext_speed |= ETH_EXT_ADV_SPEED_20G;
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if (val & QED_EXT_SPEED_MASK_25G)
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ext_speed |= ETH_EXT_ADV_SPEED_25G;
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if (val & QED_EXT_SPEED_MASK_40G)
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@ -2446,9 +2442,6 @@ qed_mcp_get_shmem_proto(struct qed_hwfn *p_hwfn,
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case FUNC_MF_CFG_PROTOCOL_ISCSI:
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*p_proto = QED_PCI_ISCSI;
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break;
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case FUNC_MF_CFG_PROTOCOL_NVMETCP:
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*p_proto = QED_PCI_NVMETCP;
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break;
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case FUNC_MF_CFG_PROTOCOL_FCOE:
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*p_proto = QED_PCI_FCOE;
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break;
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@ -3389,7 +3382,7 @@ qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
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type = NVM_TYPE_DEFAULT_CFG;
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break;
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case QED_NVM_IMAGE_NVM_META:
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type = NVM_TYPE_META;
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type = NVM_TYPE_NVM_META;
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break;
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default:
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DP_NOTICE(p_hwfn, "Unknown request of image_id %08x\n",
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