forked from Minki/linux
ARC: MMU Context Management
ARC700 MMU provides for tagging TLB entries with a 8-bit ASID to avoid having to flush the TLB every task switch. It also allows for a quick way to invalidate all the TLB entries for task useful for: * COW sementics during fork() * task exit()ing Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Vineet Gupta
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5dda4dc570
commit
f1f3347da9
@ -85,6 +85,13 @@
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#define DC_CTRL_INV_MODE_FLUSH 0x40
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#define DC_CTRL_FLUSH_STATUS 0x100
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/* MMU Management regs */
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#define ARC_REG_PID 0x409
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#define ARC_REG_SCRATCH_DATA0 0x418
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/* Bits in MMU PID register */
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#define MMU_ENABLE (1 << 31) /* Enable MMU for process */
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/*
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* Floating Pt Registers
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* Status regs are read-only (build-time) so need not be saved/restored
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23
arch/arc/include/asm/mmu.h
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arch/arc/include/asm/mmu.h
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/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _ASM_ARC_MMU_H
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#define _ASM_ARC_MMU_H
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#ifndef __ASSEMBLY__
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typedef struct {
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unsigned long asid; /* Pvt Addr-Space ID for mm */
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#ifdef CONFIG_ARC_TLB_DBG
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struct task_struct *tsk;
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#endif
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} mm_context_t;
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#endif
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#endif
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209
arch/arc/include/asm/mmu_context.h
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209
arch/arc/include/asm/mmu_context.h
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/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* vineetg: May 2011
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* -Refactored get_new_mmu_context( ) to only handle live-mm.
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* retiring-mm handled in other hooks
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*
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* Vineetg: March 25th, 2008: Bug #92690
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* -Major rewrite of Core ASID allocation routine get_new_mmu_context
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*
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* Amit Bhor, Sameer Dhavale: Codito Technologies 2004
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*/
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#ifndef _ASM_ARC_MMU_CONTEXT_H
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#define _ASM_ARC_MMU_CONTEXT_H
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#include <asm/arcregs.h>
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#include <asm/tlb.h>
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#include <asm-generic/mm_hooks.h>
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/* ARC700 ASID Management
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*
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* ARC MMU provides 8-bit ASID (0..255) to TAG TLB entries, allowing entries
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* with same vaddr (different tasks) to co-exit. This provides for
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* "Fast Context Switch" i.e. no TLB flush on ctxt-switch
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*
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* Linux assigns each task a unique ASID. A simple round-robin allocation
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* of H/w ASID is done using software tracker @asid_cache.
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* When it reaches max 255, the allocation cycle starts afresh by flushing
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* the entire TLB and wrapping ASID back to zero.
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*
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* For book-keeping, Linux uses a couple of data-structures:
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* -mm_struct has an @asid field to keep a note of task's ASID (needed at the
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* time of say switch_mm( )
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* -An array of mm structs @asid_mm_map[] for asid->mm the reverse mapping,
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* given an ASID, finding the mm struct associated.
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*
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* The round-robin allocation algorithm allows for ASID stealing.
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* If asid tracker is at "x-1", a new req will allocate "x", even if "x" was
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* already assigned to another (switched-out) task. Obviously the prev owner
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* is marked with an invalid ASID to make it request for a new ASID when it
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* gets scheduled next time. However its TLB entries (with ASID "x") could
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* exist, which must be cleared before the same ASID is used by the new owner.
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* Flushing them would be plausible but costly solution. Instead we force a
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* allocation policy quirk, which ensures that a stolen ASID won't have any
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* TLB entries associates, alleviating the need to flush.
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* The quirk essentially is not allowing ASID allocated in prev cycle
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* to be used past a roll-over in the next cycle.
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* When this happens (i.e. task ASID > asid tracker), task needs to refresh
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* its ASID, aligning it to current value of tracker. If the task doesn't get
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* scheduled past a roll-over, hence its ASID is not yet realigned with
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* tracker, such ASID is anyways safely reusable because it is
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* gauranteed that TLB entries with that ASID wont exist.
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*/
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#define FIRST_ASID 0
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#define MAX_ASID 255 /* 8 bit PID field in PID Aux reg */
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#define NO_ASID (MAX_ASID + 1) /* ASID Not alloc to mmu ctxt */
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#define NUM_ASID ((MAX_ASID - FIRST_ASID) + 1)
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/* ASID to mm struct mapping */
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extern struct mm_struct *asid_mm_map[NUM_ASID + 1];
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extern int asid_cache;
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/*
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* Assign a new ASID to task. If the task already has an ASID, it is
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* relinquished.
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*/
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static inline void get_new_mmu_context(struct mm_struct *mm)
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{
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struct mm_struct *prev_owner;
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unsigned long flags;
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local_irq_save(flags);
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/*
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* Relinquish the currently owned ASID (if any).
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* Doing unconditionally saves a cmp-n-branch; for already unused
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* ASID slot, the value was/remains NULL
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*/
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asid_mm_map[mm->context.asid] = (struct mm_struct *)NULL;
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/* move to new ASID */
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if (++asid_cache > MAX_ASID) { /* ASID roll-over */
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asid_cache = FIRST_ASID;
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flush_tlb_all();
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}
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/*
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* Is next ASID already owned by some-one else (we are stealing it).
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* If so, let the orig owner be aware of this, so when it runs, it
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* asks for a brand new ASID. This would only happen for a long-lived
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* task with ASID from prev allocation cycle (before ASID roll-over).
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*
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* This might look wrong - if we are re-using some other task's ASID,
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* won't we use it's stale TLB entries too. Actually switch_mm( ) takes
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* care of such a case: it ensures that task with ASID from prev alloc
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* cycle, when scheduled will refresh it's ASID: see switch_mm( ) below
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* The stealing scenario described here will only happen if that task
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* didn't get a chance to refresh it's ASID - implying stale entries
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* won't exist.
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*/
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prev_owner = asid_mm_map[asid_cache];
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if (prev_owner)
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prev_owner->context.asid = NO_ASID;
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/* Assign new ASID to tsk */
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asid_mm_map[asid_cache] = mm;
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mm->context.asid = asid_cache;
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#ifdef CONFIG_ARC_TLB_DBG
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pr_info("ARC_TLB_DBG: NewMM=0x%x OldMM=0x%x task_struct=0x%x Task: %s,"
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" pid:%u, assigned asid:%lu\n",
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(unsigned int)mm, (unsigned int)prev_owner,
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(unsigned int)(mm->context.tsk), (mm->context.tsk)->comm,
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(mm->context.tsk)->pid, mm->context.asid);
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#endif
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write_aux_reg(ARC_REG_PID, asid_cache | MMU_ENABLE);
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local_irq_restore(flags);
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}
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/*
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* Initialize the context related info for a new mm_struct
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* instance.
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*/
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static inline int
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init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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mm->context.asid = NO_ASID;
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#ifdef CONFIG_ARC_TLB_DBG
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mm->context.tsk = tsk;
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#endif
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return 0;
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}
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/* Prepare the MMU for task: setup PID reg with allocated ASID
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If task doesn't have an ASID (never alloc or stolen, get a new ASID)
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*/
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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/* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */
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write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd);
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/*
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* Get a new ASID if task doesn't have a valid one. Possible when
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* -task never had an ASID (fresh after fork)
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* -it's ASID was stolen - past an ASID roll-over.
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* -There's a third obscure scenario (if this task is running for the
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* first time afer an ASID rollover), where despite having a valid
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* ASID, we force a get for new ASID - see comments at top.
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*
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* Both the non-alloc scenario and first-use-after-rollover can be
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* detected using the single condition below: NO_ASID = 256
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* while asid_cache is always a valid ASID value (0-255).
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*/
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if (next->context.asid > asid_cache) {
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get_new_mmu_context(next);
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} else {
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/*
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* XXX: This will never happen given the chks above
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* BUG_ON(next->context.asid > MAX_ASID);
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*/
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write_aux_reg(ARC_REG_PID, next->context.asid | MMU_ENABLE);
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}
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}
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static inline void destroy_context(struct mm_struct *mm)
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{
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unsigned long flags;
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local_irq_save(flags);
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asid_mm_map[mm->context.asid] = NULL;
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mm->context.asid = NO_ASID;
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local_irq_restore(flags);
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}
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/* it seemed that deactivate_mm( ) is a reasonable place to do book-keeping
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* for retiring-mm. However destroy_context( ) still needs to do that because
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* between mm_release( ) = >deactive_mm( ) and
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* mmput => .. => __mmdrop( ) => destroy_context( )
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* there is a good chance that task gets sched-out/in, making it's ASID valid
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* again (this teased me for a whole day).
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*/
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#define deactivate_mm(tsk, mm) do { } while (0)
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static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
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{
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write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd);
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/* Unconditionally get a new ASID */
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get_new_mmu_context(next);
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}
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#define enter_lazy_tlb(mm, tsk)
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#endif /* __ASM_ARC_MMU_CONTEXT_H */
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23
arch/arc/mm/tlb.c
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23
arch/arc/mm/tlb.c
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@ -0,0 +1,23 @@
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/*
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* TLB Management (flush/create/diagnostics) for ARC700
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*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <asm/arcregs.h>
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#include <asm/mmu_context.h>
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#include <asm/tlb.h>
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/* A copy of the ASID from the PID reg is kept in asid_cache */
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int asid_cache = FIRST_ASID;
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/* ASID to mm struct mapping. We have one extra entry corresponding to
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* NO_ASID to save us a compare when clearing the mm entry for old asid
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* see get_new_mmu_context (asm-arc/mmu_context.h)
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*/
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struct mm_struct *asid_mm_map[NUM_ASID + 1];
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