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drm/amdgpu: Drop amdgpu_plane

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It's unnecessarily duplicating drm_plane_type.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harry Wentland 2018-10-05 11:58:34 -04:00 committed by Alex Deucher
parent c2af2a4264
commit f180b4bccc
2 changed files with 20 additions and 26 deletions
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8
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
View File

@ -57,7 +57,6 @@ struct amdgpu_hpd;
#define to_amdgpu_connector(x) container_of(x, struct amdgpu_connector, base) #define to_amdgpu_connector(x) container_of(x, struct amdgpu_connector, base)
#define to_amdgpu_encoder(x) container_of(x, struct amdgpu_encoder, base) #define to_amdgpu_encoder(x) container_of(x, struct amdgpu_encoder, base)
#define to_amdgpu_framebuffer(x) container_of(x, struct amdgpu_framebuffer, base) #define to_amdgpu_framebuffer(x) container_of(x, struct amdgpu_framebuffer, base)
#define to_amdgpu_plane(x) container_of(x, struct amdgpu_plane, base)
#define to_dm_plane_state(x) container_of(x, struct dm_plane_state, base); #define to_dm_plane_state(x) container_of(x, struct dm_plane_state, base);
@ -325,7 +324,7 @@ struct amdgpu_mode_info {
struct card_info *atom_card_info; struct card_info *atom_card_info;
bool mode_config_initialized; bool mode_config_initialized;
struct amdgpu_crtc *crtcs[AMDGPU_MAX_CRTCS]; struct amdgpu_crtc *crtcs[AMDGPU_MAX_CRTCS];
struct amdgpu_plane *planes[AMDGPU_MAX_PLANES]; struct drm_plane *planes[AMDGPU_MAX_PLANES];
struct amdgpu_afmt *afmt[AMDGPU_MAX_AFMT_BLOCKS]; struct amdgpu_afmt *afmt[AMDGPU_MAX_AFMT_BLOCKS];
/* DVI-I properties */ /* DVI-I properties */
struct drm_property *coherent_mode_property; struct drm_property *coherent_mode_property;
@ -434,11 +433,6 @@ struct amdgpu_crtc {
struct drm_pending_vblank_event *event; struct drm_pending_vblank_event *event;
}; };
struct amdgpu_plane {
struct drm_plane base;
enum drm_plane_type plane_type;
};
struct amdgpu_encoder_atom_dig { struct amdgpu_encoder_atom_dig {
bool linkb; bool linkb;
/* atom dig */ /* atom dig */

38
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View File

@ -105,7 +105,7 @@ static void
amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector); amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector);
static int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm, static int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
struct amdgpu_plane *aplane, struct drm_plane *plane,
unsigned long possible_crtcs); unsigned long possible_crtcs);
static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm, static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
struct drm_plane *plane, struct drm_plane *plane,
@ -1641,18 +1641,18 @@ static int initialize_plane(struct amdgpu_display_manager *dm,
struct amdgpu_mode_info *mode_info, struct amdgpu_mode_info *mode_info,
int plane_id) int plane_id)
{ {
struct amdgpu_plane *plane; struct drm_plane *plane;
unsigned long possible_crtcs; unsigned long possible_crtcs;
int ret = 0; int ret = 0;
plane = kzalloc(sizeof(struct amdgpu_plane), GFP_KERNEL); plane = kzalloc(sizeof(struct drm_plane), GFP_KERNEL);
mode_info->planes[plane_id] = plane; mode_info->planes[plane_id] = plane;
if (!plane) { if (!plane) {
DRM_ERROR("KMS: Failed to allocate plane\n"); DRM_ERROR("KMS: Failed to allocate plane\n");
return -ENOMEM; return -ENOMEM;
} }
plane->base.type = mode_info->plane_type[plane_id]; plane->type = mode_info->plane_type[plane_id];
/* /*
* HACK: IGT tests expect that each plane can only have * HACK: IGT tests expect that each plane can only have
@ -1743,7 +1743,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
} }
for (i = 0; i < dm->dc->caps.max_streams; i++) for (i = 0; i < dm->dc->caps.max_streams; i++)
if (amdgpu_dm_crtc_init(dm, &mode_info->planes[i]->base, i)) { if (amdgpu_dm_crtc_init(dm, mode_info->planes[i], i)) {
DRM_ERROR("KMS: Failed to initialize crtc\n"); DRM_ERROR("KMS: Failed to initialize crtc\n");
goto fail; goto fail;
} }
@ -3526,49 +3526,49 @@ static const u32 cursor_formats[] = {
}; };
static int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm, static int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
struct amdgpu_plane *aplane, struct drm_plane *plane,
unsigned long possible_crtcs) unsigned long possible_crtcs)
{ {
int res = -EPERM; int res = -EPERM;
switch (aplane->base.type) { switch (plane->type) {
case DRM_PLANE_TYPE_PRIMARY: case DRM_PLANE_TYPE_PRIMARY:
res = drm_universal_plane_init( res = drm_universal_plane_init(
dm->adev->ddev, dm->adev->ddev,
&aplane->base, plane,
possible_crtcs, possible_crtcs,
&dm_plane_funcs, &dm_plane_funcs,
rgb_formats, rgb_formats,
ARRAY_SIZE(rgb_formats), ARRAY_SIZE(rgb_formats),
NULL, aplane->base.type, NULL); NULL, plane->type, NULL);
break; break;
case DRM_PLANE_TYPE_OVERLAY: case DRM_PLANE_TYPE_OVERLAY:
res = drm_universal_plane_init( res = drm_universal_plane_init(
dm->adev->ddev, dm->adev->ddev,
&aplane->base, plane,
possible_crtcs, possible_crtcs,
&dm_plane_funcs, &dm_plane_funcs,
yuv_formats, yuv_formats,
ARRAY_SIZE(yuv_formats), ARRAY_SIZE(yuv_formats),
NULL, aplane->base.type, NULL); NULL, plane->type, NULL);
break; break;
case DRM_PLANE_TYPE_CURSOR: case DRM_PLANE_TYPE_CURSOR:
res = drm_universal_plane_init( res = drm_universal_plane_init(
dm->adev->ddev, dm->adev->ddev,
&aplane->base, plane,
possible_crtcs, possible_crtcs,
&dm_plane_funcs, &dm_plane_funcs,
cursor_formats, cursor_formats,
ARRAY_SIZE(cursor_formats), ARRAY_SIZE(cursor_formats),
NULL, aplane->base.type, NULL); NULL, plane->type, NULL);
break; break;
} }
drm_plane_helper_add(&aplane->base, &dm_plane_helper_funcs); drm_plane_helper_add(plane, &dm_plane_helper_funcs);
/* Create (reset) the plane state */ /* Create (reset) the plane state */
if (aplane->base.funcs->reset) if (plane->funcs->reset)
aplane->base.funcs->reset(&aplane->base); plane->funcs->reset(plane);
return res; return res;
@ -3579,7 +3579,7 @@ static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
uint32_t crtc_index) uint32_t crtc_index)
{ {
struct amdgpu_crtc *acrtc = NULL; struct amdgpu_crtc *acrtc = NULL;
struct amdgpu_plane *cursor_plane; struct drm_plane *cursor_plane;
int res = -ENOMEM; int res = -ENOMEM;
@ -3587,7 +3587,7 @@ static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
if (!cursor_plane) if (!cursor_plane)
goto fail; goto fail;
cursor_plane->base.type = DRM_PLANE_TYPE_CURSOR; cursor_plane->type = DRM_PLANE_TYPE_CURSOR;
res = amdgpu_dm_plane_init(dm, cursor_plane, 0); res = amdgpu_dm_plane_init(dm, cursor_plane, 0);
acrtc = kzalloc(sizeof(struct amdgpu_crtc), GFP_KERNEL); acrtc = kzalloc(sizeof(struct amdgpu_crtc), GFP_KERNEL);
@ -3598,7 +3598,7 @@ static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
dm->ddev, dm->ddev,
&acrtc->base, &acrtc->base,
plane, plane,
&cursor_plane->base, cursor_plane,
&amdgpu_dm_crtc_funcs, NULL); &amdgpu_dm_crtc_funcs, NULL);
if (res) if (res)