drm/amd/display: remove unused functions in amdgpu_dm_irq.c
Not used. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -228,27 +228,6 @@ static void remove_timer_handler(struct amdgpu_device *adev,
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}
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}
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}
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}
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/**
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* dm_timer_work_func - Handle a timer.
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*
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* @work: work struct
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*/
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static void dm_timer_work_func(struct work_struct *work)
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{
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struct amdgpu_dm_timer_handler_data *handler_data =
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container_of(work, struct amdgpu_dm_timer_handler_data,
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d_work.work);
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DRM_DEBUG_KMS("DM_IRQ: work_func: handler_data=%p\n", handler_data);
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/* Call a DAL subcomponent which registered for timer notification. */
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handler_data->hcd.handler(handler_data->hcd.handler_arg);
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/* We support only "single shot" timers. That means we must delete
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* the handler after it was called. */
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remove_timer_handler(handler_data->hcd.dm->adev, handler_data);
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}
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static bool
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static bool
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validate_irq_registration_params(struct dc_interrupt_params *int_params,
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validate_irq_registration_params(struct dc_interrupt_params *int_params,
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void (*ih)(void *))
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void (*ih)(void *))
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@ -419,47 +398,6 @@ int amdgpu_dm_irq_init(struct amdgpu_device *adev)
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return 0;
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return 0;
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}
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}
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void amdgpu_dm_irq_register_timer(struct amdgpu_device *adev,
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struct dc_timer_interrupt_params *int_params,
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interrupt_handler ih,
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void *args)
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{
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unsigned long jf_delay;
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struct list_head *handler_list;
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struct amdgpu_dm_timer_handler_data *handler_data;
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unsigned long irq_table_flags;
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handler_data = kzalloc(sizeof(*handler_data), GFP_KERNEL);
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if (!handler_data) {
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DRM_ERROR("DM_IRQ: failed to allocate timer handler!\n");
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return;
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}
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memset(handler_data, 0, sizeof(*handler_data));
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init_handler_common_data(&handler_data->hcd, ih, args, &adev->dm);
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INIT_DELAYED_WORK(&handler_data->d_work, dm_timer_work_func);
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/* Lock the list, add the handler. */
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DM_IRQ_TABLE_LOCK(adev, irq_table_flags);
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handler_list = &adev->dm.timer_handler_list;
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list_add_tail(&handler_data->hcd.list, handler_list);
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DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags);
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jf_delay = usecs_to_jiffies(int_params->micro_sec_interval);
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queue_delayed_work(adev->dm.timer_workqueue, &handler_data->d_work,
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jf_delay);
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DRM_DEBUG_KMS("DM_IRQ: added handler:%p with micro_sec_interval=%u\n",
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handler_data, int_params->micro_sec_interval);
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return;
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}
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/* DM IRQ and timer resource release */
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/* DM IRQ and timer resource release */
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void amdgpu_dm_irq_fini(struct amdgpu_device *adev)
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void amdgpu_dm_irq_fini(struct amdgpu_device *adev)
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{
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{
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@ -80,11 +80,6 @@ void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
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enum dc_irq_source irq_source,
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enum dc_irq_source irq_source,
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void *ih_index);
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void *ih_index);
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void amdgpu_dm_irq_register_timer(struct amdgpu_device *adev,
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struct dc_timer_interrupt_params *int_params,
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interrupt_handler ih,
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void *args);
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/**
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/**
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* amdgpu_dm_irq_handler
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* amdgpu_dm_irq_handler
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* Generic IRQ handler, calls all registered high irq work immediately, and
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* Generic IRQ handler, calls all registered high irq work immediately, and
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