forked from Minki/linux
video: Add i.MX23/28 framebuffer driver
changes since v2: - use v3 and v4 for specifying the ip version instead of i.MX23/28. This is a better namespace when future versions are added. - rename mach/fb.h to mach/mxsfb.h changes since v1: - Add a LCDC_ prefix to the register names. - use set/clear registers where appropriate - protect call to mxsfb_disable_controller() in mxsfb_remove() with a (host->enabled) as suggested by Lothar Wassmann Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@freescale.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: linux-fbdev@vger.kernel.org
This commit is contained in:
Sascha Hauer
parent
8d8eb17765
commit
f0a523b5e5
49
arch/arm/mach-mxs/include/mach/mxsfb.h
Normal file
49
arch/arm/mach-mxs/include/mach/mxsfb.h
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@ -0,0 +1,49 @@
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/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __MACH_FB_H
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#define __MACH_FB_H
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#include <linux/fb.h>
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#define STMLCDIF_8BIT 1 /** pixel data bus to the display is of 8 bit width */
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#define STMLCDIF_16BIT 0 /** pixel data bus to the display is of 16 bit width */
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#define STMLCDIF_18BIT 2 /** pixel data bus to the display is of 18 bit width */
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#define STMLCDIF_24BIT 3 /** pixel data bus to the display is of 24 bit width */
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#define FB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6)
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#define FB_SYNC_DOTCLK_FAILING_ACT (1 << 7) /* failing/negtive edge sampling */
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struct mxsfb_platform_data {
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struct fb_videomode *mode_list;
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unsigned mode_count;
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unsigned default_bpp;
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unsigned dotclk_delay; /* refer manual HW_LCDIF_VDCTRL4 register */
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unsigned ld_intf_width; /* refer STMLCDIF_* macros */
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unsigned fb_size; /* Size of the video memory. If zero a
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* default will be used
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*/
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unsigned long fb_phys; /* physical address for the video memory. If
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* zero the framebuffer memory will be dynamically
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* allocated. If specified,fb_size must also be specified.
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* fb_phys must be unused by Linux.
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*/
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};
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#endif /* __MACH_FB_H */
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@ -2365,6 +2365,15 @@ config FB_JZ4740
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help
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Framebuffer support for the JZ4740 SoC.
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config FB_MXS
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tristate "MXS LCD framebuffer support"
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depends on FB && ARCH_MXS
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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help
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Framebuffer support for the MXS SoC.
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source "drivers/video/omap/Kconfig"
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source "drivers/video/omap2/Kconfig"
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@ -153,6 +153,7 @@ obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o
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obj-$(CONFIG_FB_BFIN_7393) += bfin_adv7393fb.o
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obj-$(CONFIG_FB_MX3) += mx3fb.o
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obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o
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obj-$(CONFIG_FB_MXS) += mxsfb.o
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# the test framebuffer is last
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obj-$(CONFIG_FB_VIRTUAL) += vfb.o
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919
drivers/video/mxsfb.c
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919
drivers/video/mxsfb.c
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@ -0,0 +1,919 @@
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/*
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* Copyright (C) 2010 Juergen Beisert, Pengutronix
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*
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* This code is based on:
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* Author: Vitaly Wool <vital@embeddedalley.com>
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*
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* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define DRIVER_NAME "mxsfb"
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/**
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* @file
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* @brief LCDIF driver for i.MX23 and i.MX28
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*
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* The LCDIF support four modes of operation
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* - MPU interface (to drive smart displays) -> not supported yet
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* - VSYNC interface (like MPU interface plus Vsync) -> not supported yet
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* - Dotclock interface (to drive LC displays with RGB data and sync signals)
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* - DVI (to drive ITU-R BT656) -> not supported yet
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*
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* This driver depends on a correct setup of the pins used for this purpose
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* (platform specific).
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*
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* For the developer: Don't forget to set the data bus width to the display
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* in the imx_fb_videomode structure. You will else end up with ugly colours.
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* If you fight against jitter you can vary the clock delay. This is a feature
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* of the i.MX28 and you can vary it between 2 ns ... 8 ns in 2 ns steps. Give
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* the required value in the imx_fb_videomode structure.
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <mach/mxsfb.h>
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#define REG_SET 4
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#define REG_CLR 8
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#define LCDC_CTRL 0x00
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#define LCDC_CTRL1 0x10
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#define LCDC_V4_CTRL2 0x20
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#define LCDC_V3_TRANSFER_COUNT 0x20
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#define LCDC_V4_TRANSFER_COUNT 0x30
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#define LCDC_V4_CUR_BUF 0x40
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#define LCDC_V4_NEXT_BUF 0x50
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#define LCDC_V3_CUR_BUF 0x30
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#define LCDC_V3_NEXT_BUF 0x40
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#define LCDC_TIMING 0x60
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#define LCDC_VDCTRL0 0x70
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#define LCDC_VDCTRL1 0x80
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#define LCDC_VDCTRL2 0x90
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#define LCDC_VDCTRL3 0xa0
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#define LCDC_VDCTRL4 0xb0
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#define LCDC_DVICTRL0 0xc0
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#define LCDC_DVICTRL1 0xd0
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#define LCDC_DVICTRL2 0xe0
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#define LCDC_DVICTRL3 0xf0
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#define LCDC_DVICTRL4 0x100
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#define LCDC_V4_DATA 0x180
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#define LCDC_V3_DATA 0x1b0
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#define LCDC_V4_DEBUG0 0x1d0
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#define LCDC_V3_DEBUG0 0x1f0
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#define CTRL_SFTRST (1 << 31)
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#define CTRL_CLKGATE (1 << 30)
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#define CTRL_BYPASS_COUNT (1 << 19)
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#define CTRL_VSYNC_MODE (1 << 18)
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#define CTRL_DOTCLK_MODE (1 << 17)
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#define CTRL_DATA_SELECT (1 << 16)
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#define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10)
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#define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3)
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#define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8)
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#define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3)
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#define CTRL_MASTER (1 << 5)
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#define CTRL_DF16 (1 << 3)
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#define CTRL_DF18 (1 << 2)
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#define CTRL_DF24 (1 << 1)
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#define CTRL_RUN (1 << 0)
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#define CTRL1_FIFO_CLEAR (1 << 21)
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#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16)
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#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf)
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#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16)
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#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff)
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#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff)
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#define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff)
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#define VDCTRL0_ENABLE_PRESENT (1 << 28)
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#define VDCTRL0_VSYNC_ACT_HIGH (1 << 27)
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#define VDCTRL0_HSYNC_ACT_HIGH (1 << 26)
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#define VDCTRL0_DOTCLK_ACT_FAILING (1 << 25)
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#define VDCTRL0_ENABLE_ACT_HIGH (1 << 24)
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#define VDCTRL0_VSYNC_PERIOD_UNIT (1 << 21)
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#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT (1 << 20)
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#define VDCTRL0_HALF_LINE (1 << 19)
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#define VDCTRL0_HALF_LINE_MODE (1 << 18)
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#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
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#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
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#define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
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#define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
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#define VDCTRL3_MUX_SYNC_SIGNALS (1 << 29)
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#define VDCTRL3_VSYNC_ONLY (1 << 28)
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#define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16)
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#define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff)
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#define SET_VERT_WAIT_CNT(x) ((x) & 0xffff)
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#define GET_VERT_WAIT_CNT(x) ((x) & 0xffff)
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#define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */
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#define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */
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#define VDCTRL4_SYNC_SIGNALS_ON (1 << 18)
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#define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff)
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#define DEBUG0_HSYNC (1 < 26)
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#define DEBUG0_VSYNC (1 < 25)
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#define MIN_XRES 120
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#define MIN_YRES 120
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#define RED 0
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#define GREEN 1
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#define BLUE 2
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#define TRANSP 3
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enum mxsfb_devtype {
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MXSFB_V3,
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MXSFB_V4,
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};
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/* CPU dependent register offsets */
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struct mxsfb_devdata {
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unsigned transfer_count;
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unsigned cur_buf;
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unsigned next_buf;
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unsigned debug0;
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unsigned hs_wdth_mask;
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unsigned hs_wdth_shift;
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unsigned ipversion;
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};
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struct mxsfb_info {
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struct fb_info fb_info;
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struct platform_device *pdev;
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struct clk *clk;
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void __iomem *base; /* registers */
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unsigned allocated_size;
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int enabled;
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unsigned ld_intf_width;
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unsigned dotclk_delay;
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const struct mxsfb_devdata *devdata;
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int mapped;
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};
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#define mxsfb_is_v3(host) (host->devdata->ipversion == 3)
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#define mxsfb_is_v4(host) (host->devdata->ipversion == 4)
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static const struct mxsfb_devdata mxsfb_devdata[] = {
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[MXSFB_V3] = {
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.transfer_count = LCDC_V3_TRANSFER_COUNT,
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.cur_buf = LCDC_V3_CUR_BUF,
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.next_buf = LCDC_V3_NEXT_BUF,
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.debug0 = LCDC_V3_DEBUG0,
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.hs_wdth_mask = 0xff,
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.hs_wdth_shift = 24,
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.ipversion = 3,
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},
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[MXSFB_V4] = {
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.transfer_count = LCDC_V4_TRANSFER_COUNT,
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.cur_buf = LCDC_V4_CUR_BUF,
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.next_buf = LCDC_V4_NEXT_BUF,
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.debug0 = LCDC_V4_DEBUG0,
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.hs_wdth_mask = 0x3fff,
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.hs_wdth_shift = 18,
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.ipversion = 4,
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},
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};
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#define to_imxfb_host(x) (container_of(x, struct mxsfb_info, fb_info))
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/* mask and shift depends on architecture */
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static inline u32 set_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
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{
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return (val & host->devdata->hs_wdth_mask) <<
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host->devdata->hs_wdth_shift;
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}
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static inline u32 get_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
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{
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return (val >> host->devdata->hs_wdth_shift) &
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host->devdata->hs_wdth_mask;
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}
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static const struct fb_bitfield def_rgb565[] = {
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[RED] = {
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.offset = 11,
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.length = 5,
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},
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[GREEN] = {
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.offset = 5,
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.length = 6,
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},
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[BLUE] = {
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.offset = 0,
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.length = 5,
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},
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[TRANSP] = { /* no support for transparency */
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.length = 0,
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}
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};
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static const struct fb_bitfield def_rgb666[] = {
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[RED] = {
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.offset = 16,
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.length = 6,
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},
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[GREEN] = {
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.offset = 8,
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.length = 6,
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},
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[BLUE] = {
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.offset = 0,
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.length = 6,
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},
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[TRANSP] = { /* no support for transparency */
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.length = 0,
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}
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};
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static const struct fb_bitfield def_rgb888[] = {
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[RED] = {
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.offset = 16,
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.length = 8,
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},
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[GREEN] = {
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.offset = 8,
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.length = 8,
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},
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[BLUE] = {
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.offset = 0,
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.length = 8,
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},
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[TRANSP] = { /* no support for transparency */
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.length = 0,
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}
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};
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static inline unsigned chan_to_field(unsigned chan, struct fb_bitfield *bf)
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{
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chan &= 0xffff;
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chan >>= 16 - bf->length;
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return chan << bf->offset;
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}
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static int mxsfb_check_var(struct fb_var_screeninfo *var,
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struct fb_info *fb_info)
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{
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struct mxsfb_info *host = to_imxfb_host(fb_info);
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const struct fb_bitfield *rgb = NULL;
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if (var->xres < MIN_XRES)
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var->xres = MIN_XRES;
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if (var->yres < MIN_YRES)
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var->yres = MIN_YRES;
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var->xres_virtual = var->xres;
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var->yres_virtual = var->yres;
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switch (var->bits_per_pixel) {
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case 16:
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/* always expect RGB 565 */
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rgb = def_rgb565;
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break;
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case 32:
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switch (host->ld_intf_width) {
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case STMLCDIF_8BIT:
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pr_debug("Unsupported LCD bus width mapping\n");
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break;
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case STMLCDIF_16BIT:
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case STMLCDIF_18BIT:
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/* 24 bit to 18 bit mapping */
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rgb = def_rgb666;
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break;
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case STMLCDIF_24BIT:
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/* real 24 bit */
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rgb = def_rgb888;
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break;
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}
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break;
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default:
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pr_debug("Unsupported colour depth: %u\n", var->bits_per_pixel);
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return -EINVAL;
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}
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/*
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* Copy the RGB parameters for this display
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* from the machine specific parameters.
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*/
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var->red = rgb[RED];
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var->green = rgb[GREEN];
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var->blue = rgb[BLUE];
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var->transp = rgb[TRANSP];
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return 0;
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}
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static void mxsfb_enable_controller(struct fb_info *fb_info)
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{
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struct mxsfb_info *host = to_imxfb_host(fb_info);
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u32 reg;
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dev_dbg(&host->pdev->dev, "%s\n", __func__);
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clk_enable(host->clk);
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clk_set_rate(host->clk, PICOS2KHZ(fb_info->var.pixclock) * 1000U);
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/* if it was disabled, re-enable the mode again */
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writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_SET);
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/* enable the SYNC signals first, then the DMA engine */
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reg = readl(host->base + LCDC_VDCTRL4);
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reg |= VDCTRL4_SYNC_SIGNALS_ON;
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writel(reg, host->base + LCDC_VDCTRL4);
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writel(CTRL_RUN, host->base + LCDC_CTRL + REG_SET);
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host->enabled = 1;
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}
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static void mxsfb_disable_controller(struct fb_info *fb_info)
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{
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struct mxsfb_info *host = to_imxfb_host(fb_info);
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unsigned loop;
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u32 reg;
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dev_dbg(&host->pdev->dev, "%s\n", __func__);
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/*
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* Even if we disable the controller here, it will still continue
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||||
* until its FIFOs are running out of data
|
||||
*/
|
||||
writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_CLR);
|
||||
|
||||
loop = 1000;
|
||||
while (loop) {
|
||||
reg = readl(host->base + LCDC_CTRL);
|
||||
if (!(reg & CTRL_RUN))
|
||||
break;
|
||||
loop--;
|
||||
}
|
||||
|
||||
writel(VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4 + REG_CLR);
|
||||
|
||||
clk_disable(host->clk);
|
||||
|
||||
host->enabled = 0;
|
||||
}
|
||||
|
||||
static int mxsfb_set_par(struct fb_info *fb_info)
|
||||
{
|
||||
struct mxsfb_info *host = to_imxfb_host(fb_info);
|
||||
u32 ctrl, vdctrl0, vdctrl4;
|
||||
int line_size, fb_size;
|
||||
int reenable = 0;
|
||||
|
||||
line_size = fb_info->var.xres * (fb_info->var.bits_per_pixel >> 3);
|
||||
fb_size = fb_info->var.yres_virtual * line_size;
|
||||
|
||||
if (fb_size > fb_info->fix.smem_len)
|
||||
return -ENOMEM;
|
||||
|
||||
fb_info->fix.line_length = line_size;
|
||||
|
||||
/*
|
||||
* It seems, you can't re-program the controller if it is still running.
|
||||
* This may lead into shifted pictures (FIFO issue?).
|
||||
* So, first stop the controller and drain its FIFOs
|
||||
*/
|
||||
if (host->enabled) {
|
||||
reenable = 1;
|
||||
mxsfb_disable_controller(fb_info);
|
||||
}
|
||||
|
||||
/* clear the FIFOs */
|
||||
writel(CTRL1_FIFO_CLEAR, host->base + LCDC_CTRL1 + REG_SET);
|
||||
|
||||
ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER |
|
||||
CTRL_SET_BUS_WIDTH(host->ld_intf_width);;
|
||||
|
||||
switch (fb_info->var.bits_per_pixel) {
|
||||
case 16:
|
||||
dev_dbg(&host->pdev->dev, "Setting up RGB565 mode\n");
|
||||
ctrl |= CTRL_SET_WORD_LENGTH(0);
|
||||
writel(CTRL1_SET_BYTE_PACKAGING(0xf), host->base + LCDC_CTRL1);
|
||||
break;
|
||||
case 32:
|
||||
dev_dbg(&host->pdev->dev, "Setting up RGB888/666 mode\n");
|
||||
ctrl |= CTRL_SET_WORD_LENGTH(3);
|
||||
switch (host->ld_intf_width) {
|
||||
case STMLCDIF_8BIT:
|
||||
dev_dbg(&host->pdev->dev,
|
||||
"Unsupported LCD bus width mapping\n");
|
||||
return -EINVAL;
|
||||
case STMLCDIF_16BIT:
|
||||
case STMLCDIF_18BIT:
|
||||
/* 24 bit to 18 bit mapping */
|
||||
ctrl |= CTRL_DF24; /* ignore the upper 2 bits in
|
||||
* each colour component
|
||||
*/
|
||||
break;
|
||||
case STMLCDIF_24BIT:
|
||||
/* real 24 bit */
|
||||
break;
|
||||
}
|
||||
/* do not use packed pixels = one pixel per word instead */
|
||||
writel(CTRL1_SET_BYTE_PACKAGING(0x7), host->base + LCDC_CTRL1);
|
||||
break;
|
||||
default:
|
||||
dev_dbg(&host->pdev->dev, "Unhandled color depth of %u\n",
|
||||
fb_info->var.bits_per_pixel);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
writel(ctrl, host->base + LCDC_CTRL);
|
||||
|
||||
writel(TRANSFER_COUNT_SET_VCOUNT(fb_info->var.yres) |
|
||||
TRANSFER_COUNT_SET_HCOUNT(fb_info->var.xres),
|
||||
host->base + host->devdata->transfer_count);
|
||||
|
||||
vdctrl0 = VDCTRL0_ENABLE_PRESENT | /* always in DOTCLOCK mode */
|
||||
VDCTRL0_VSYNC_PERIOD_UNIT |
|
||||
VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
|
||||
VDCTRL0_SET_VSYNC_PULSE_WIDTH(fb_info->var.vsync_len);
|
||||
if (fb_info->var.sync & FB_SYNC_HOR_HIGH_ACT)
|
||||
vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH;
|
||||
if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT)
|
||||
vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH;
|
||||
if (fb_info->var.sync & FB_SYNC_DATA_ENABLE_HIGH_ACT)
|
||||
vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
|
||||
if (fb_info->var.sync & FB_SYNC_DOTCLK_FAILING_ACT)
|
||||
vdctrl0 |= VDCTRL0_DOTCLK_ACT_FAILING;
|
||||
|
||||
writel(vdctrl0, host->base + LCDC_VDCTRL0);
|
||||
|
||||
/* frame length in lines */
|
||||
writel(fb_info->var.upper_margin + fb_info->var.vsync_len +
|
||||
fb_info->var.lower_margin + fb_info->var.yres,
|
||||
host->base + LCDC_VDCTRL1);
|
||||
|
||||
/* line length in units of clocks or pixels */
|
||||
writel(set_hsync_pulse_width(host, fb_info->var.hsync_len) |
|
||||
VDCTRL2_SET_HSYNC_PERIOD(fb_info->var.left_margin +
|
||||
fb_info->var.hsync_len + fb_info->var.right_margin +
|
||||
fb_info->var.xres),
|
||||
host->base + LCDC_VDCTRL2);
|
||||
|
||||
writel(SET_HOR_WAIT_CNT(fb_info->var.left_margin +
|
||||
fb_info->var.hsync_len) |
|
||||
SET_VERT_WAIT_CNT(fb_info->var.upper_margin +
|
||||
fb_info->var.vsync_len),
|
||||
host->base + LCDC_VDCTRL3);
|
||||
|
||||
vdctrl4 = SET_DOTCLK_H_VALID_DATA_CNT(fb_info->var.xres);
|
||||
if (mxsfb_is_v4(host))
|
||||
vdctrl4 |= VDCTRL4_SET_DOTCLK_DLY(host->dotclk_delay);
|
||||
writel(vdctrl4, host->base + LCDC_VDCTRL4);
|
||||
|
||||
writel(fb_info->fix.smem_start +
|
||||
fb_info->fix.line_length * fb_info->var.yoffset,
|
||||
host->base + host->devdata->next_buf);
|
||||
|
||||
if (reenable)
|
||||
mxsfb_enable_controller(fb_info);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mxsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
|
||||
u_int transp, struct fb_info *fb_info)
|
||||
{
|
||||
unsigned int val;
|
||||
int ret = -EINVAL;
|
||||
|
||||
/*
|
||||
* If greyscale is true, then we convert the RGB value
|
||||
* to greyscale no matter what visual we are using.
|
||||
*/
|
||||
if (fb_info->var.grayscale)
|
||||
red = green = blue = (19595 * red + 38470 * green +
|
||||
7471 * blue) >> 16;
|
||||
|
||||
switch (fb_info->fix.visual) {
|
||||
case FB_VISUAL_TRUECOLOR:
|
||||
/*
|
||||
* 12 or 16-bit True Colour. We encode the RGB value
|
||||
* according to the RGB bitfield information.
|
||||
*/
|
||||
if (regno < 16) {
|
||||
u32 *pal = fb_info->pseudo_palette;
|
||||
|
||||
val = chan_to_field(red, &fb_info->var.red);
|
||||
val |= chan_to_field(green, &fb_info->var.green);
|
||||
val |= chan_to_field(blue, &fb_info->var.blue);
|
||||
|
||||
pal[regno] = val;
|
||||
ret = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case FB_VISUAL_STATIC_PSEUDOCOLOR:
|
||||
case FB_VISUAL_PSEUDOCOLOR:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mxsfb_blank(int blank, struct fb_info *fb_info)
|
||||
{
|
||||
struct mxsfb_info *host = to_imxfb_host(fb_info);
|
||||
|
||||
switch (blank) {
|
||||
case FB_BLANK_POWERDOWN:
|
||||
case FB_BLANK_VSYNC_SUSPEND:
|
||||
case FB_BLANK_HSYNC_SUSPEND:
|
||||
case FB_BLANK_NORMAL:
|
||||
if (host->enabled)
|
||||
mxsfb_disable_controller(fb_info);
|
||||
break;
|
||||
|
||||
case FB_BLANK_UNBLANK:
|
||||
if (!host->enabled)
|
||||
mxsfb_enable_controller(fb_info);
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mxsfb_pan_display(struct fb_var_screeninfo *var,
|
||||
struct fb_info *fb_info)
|
||||
{
|
||||
struct mxsfb_info *host = to_imxfb_host(fb_info);
|
||||
unsigned offset;
|
||||
|
||||
if (var->xoffset != 0)
|
||||
return -EINVAL;
|
||||
|
||||
offset = fb_info->fix.line_length * var->yoffset;
|
||||
|
||||
/* update on next VSYNC */
|
||||
writel(fb_info->fix.smem_start + offset,
|
||||
host->base + host->devdata->next_buf);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct fb_ops mxsfb_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.fb_check_var = mxsfb_check_var,
|
||||
.fb_set_par = mxsfb_set_par,
|
||||
.fb_setcolreg = mxsfb_setcolreg,
|
||||
.fb_blank = mxsfb_blank,
|
||||
.fb_pan_display = mxsfb_pan_display,
|
||||
.fb_fillrect = cfb_fillrect,
|
||||
.fb_copyarea = cfb_copyarea,
|
||||
.fb_imageblit = cfb_imageblit,
|
||||
};
|
||||
|
||||
static int __devinit mxsfb_restore_mode(struct mxsfb_info *host)
|
||||
{
|
||||
struct fb_info *fb_info = &host->fb_info;
|
||||
unsigned line_count;
|
||||
unsigned period;
|
||||
unsigned long pa, fbsize;
|
||||
int bits_per_pixel, ofs;
|
||||
u32 transfer_count, vdctrl0, vdctrl2, vdctrl3, vdctrl4, ctrl;
|
||||
struct fb_videomode vmode;
|
||||
|
||||
/* Only restore the mode when the controller is running */
|
||||
ctrl = readl(host->base + LCDC_CTRL);
|
||||
if (!(ctrl & CTRL_RUN))
|
||||
return -EINVAL;
|
||||
|
||||
vdctrl0 = readl(host->base + LCDC_VDCTRL0);
|
||||
vdctrl2 = readl(host->base + LCDC_VDCTRL2);
|
||||
vdctrl3 = readl(host->base + LCDC_VDCTRL3);
|
||||
vdctrl4 = readl(host->base + LCDC_VDCTRL4);
|
||||
|
||||
transfer_count = readl(host->base + host->devdata->transfer_count);
|
||||
|
||||
vmode.xres = TRANSFER_COUNT_GET_HCOUNT(transfer_count);
|
||||
vmode.yres = TRANSFER_COUNT_GET_VCOUNT(transfer_count);
|
||||
|
||||
switch (CTRL_GET_WORD_LENGTH(ctrl)) {
|
||||
case 0:
|
||||
bits_per_pixel = 16;
|
||||
break;
|
||||
case 3:
|
||||
bits_per_pixel = 32;
|
||||
case 1:
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
fb_info->var.bits_per_pixel = bits_per_pixel;
|
||||
|
||||
vmode.pixclock = KHZ2PICOS(clk_get_rate(host->clk) / 1000U);
|
||||
vmode.hsync_len = get_hsync_pulse_width(host, vdctrl2);
|
||||
vmode.left_margin = GET_HOR_WAIT_CNT(vdctrl3) - vmode.hsync_len;
|
||||
vmode.right_margin = VDCTRL2_GET_HSYNC_PERIOD(vdctrl2) - vmode.hsync_len -
|
||||
vmode.left_margin - vmode.xres;
|
||||
vmode.vsync_len = VDCTRL0_GET_VSYNC_PULSE_WIDTH(vdctrl0);
|
||||
period = readl(host->base + LCDC_VDCTRL1);
|
||||
vmode.upper_margin = GET_VERT_WAIT_CNT(vdctrl3) - vmode.vsync_len;
|
||||
vmode.lower_margin = period - vmode.vsync_len - vmode.upper_margin - vmode.yres;
|
||||
|
||||
vmode.vmode = FB_VMODE_NONINTERLACED;
|
||||
|
||||
vmode.sync = 0;
|
||||
if (vdctrl0 & VDCTRL0_HSYNC_ACT_HIGH)
|
||||
vmode.sync |= FB_SYNC_HOR_HIGH_ACT;
|
||||
if (vdctrl0 & VDCTRL0_VSYNC_ACT_HIGH)
|
||||
vmode.sync |= FB_SYNC_VERT_HIGH_ACT;
|
||||
|
||||
pr_debug("Reconstructed video mode:\n");
|
||||
pr_debug("%dx%d, hsync: %u left: %u, right: %u, vsync: %u, upper: %u, lower: %u\n",
|
||||
vmode.xres, vmode.yres,
|
||||
vmode.hsync_len, vmode.left_margin, vmode.right_margin,
|
||||
vmode.vsync_len, vmode.upper_margin, vmode.lower_margin);
|
||||
pr_debug("pixclk: %ldkHz\n", PICOS2KHZ(vmode.pixclock));
|
||||
|
||||
fb_add_videomode(&vmode, &fb_info->modelist);
|
||||
|
||||
host->ld_intf_width = CTRL_GET_BUS_WIDTH(ctrl);
|
||||
host->dotclk_delay = VDCTRL4_GET_DOTCLK_DLY(vdctrl4);
|
||||
|
||||
fb_info->fix.line_length = vmode.xres * (bits_per_pixel >> 3);
|
||||
|
||||
pa = readl(host->base + host->devdata->cur_buf);
|
||||
fbsize = fb_info->fix.line_length * vmode.yres;
|
||||
if (pa < fb_info->fix.smem_start)
|
||||
return -EINVAL;
|
||||
if (pa + fbsize > fb_info->fix.smem_start + fb_info->fix.smem_len)
|
||||
return -EINVAL;
|
||||
ofs = pa - fb_info->fix.smem_start;
|
||||
if (ofs) {
|
||||
memmove(fb_info->screen_base, fb_info->screen_base + ofs, fbsize);
|
||||
writel(fb_info->fix.smem_start, host->base + host->devdata->next_buf);
|
||||
}
|
||||
|
||||
line_count = fb_info->fix.smem_len / fb_info->fix.line_length;
|
||||
fb_info->fix.ypanstep = 1;
|
||||
|
||||
clk_enable(host->clk);
|
||||
host->enabled = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit mxsfb_init_fbinfo(struct mxsfb_info *host)
|
||||
{
|
||||
struct fb_info *fb_info = &host->fb_info;
|
||||
struct fb_var_screeninfo *var = &fb_info->var;
|
||||
struct mxsfb_platform_data *pdata = host->pdev->dev.platform_data;
|
||||
dma_addr_t fb_phys;
|
||||
void *fb_virt;
|
||||
unsigned fb_size = pdata->fb_size;
|
||||
|
||||
fb_info->fbops = &mxsfb_ops;
|
||||
fb_info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST;
|
||||
strlcpy(fb_info->fix.id, "mxs", sizeof(fb_info->fix.id));
|
||||
fb_info->fix.type = FB_TYPE_PACKED_PIXELS;
|
||||
fb_info->fix.ypanstep = 1;
|
||||
fb_info->fix.visual = FB_VISUAL_TRUECOLOR,
|
||||
fb_info->fix.accel = FB_ACCEL_NONE;
|
||||
|
||||
var->bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
|
||||
var->nonstd = 0;
|
||||
var->activate = FB_ACTIVATE_NOW;
|
||||
var->accel_flags = 0;
|
||||
var->vmode = FB_VMODE_NONINTERLACED;
|
||||
|
||||
host->dotclk_delay = pdata->dotclk_delay;
|
||||
host->ld_intf_width = pdata->ld_intf_width;
|
||||
|
||||
/* Memory allocation for framebuffer */
|
||||
if (pdata->fb_phys) {
|
||||
if (!fb_size)
|
||||
return -EINVAL;
|
||||
|
||||
fb_phys = pdata->fb_phys;
|
||||
|
||||
if (!request_mem_region(fb_phys, fb_size, host->pdev->name))
|
||||
return -ENOMEM;
|
||||
|
||||
fb_virt = ioremap(fb_phys, fb_size);
|
||||
if (!fb_virt) {
|
||||
release_mem_region(fb_phys, fb_size);
|
||||
return -ENOMEM;
|
||||
}
|
||||
host->mapped = 1;
|
||||
} else {
|
||||
if (!fb_size)
|
||||
fb_size = SZ_2M; /* default */
|
||||
fb_virt = alloc_pages_exact(fb_size, GFP_DMA);
|
||||
if (!fb_virt)
|
||||
return -ENOMEM;
|
||||
|
||||
fb_phys = virt_to_phys(fb_virt);
|
||||
}
|
||||
|
||||
fb_info->fix.smem_start = fb_phys;
|
||||
fb_info->screen_base = fb_virt;
|
||||
fb_info->screen_size = fb_info->fix.smem_len = fb_size;
|
||||
|
||||
if (mxsfb_restore_mode(host))
|
||||
memset(fb_virt, 0, fb_size);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __devexit mxsfb_free_videomem(struct mxsfb_info *host)
|
||||
{
|
||||
struct fb_info *fb_info = &host->fb_info;
|
||||
|
||||
if (host->mapped) {
|
||||
iounmap(fb_info->screen_base);
|
||||
release_mem_region(fb_info->fix.smem_start,
|
||||
fb_info->screen_size);
|
||||
} else {
|
||||
free_pages_exact(fb_info->screen_base, fb_info->fix.smem_len);
|
||||
}
|
||||
}
|
||||
|
||||
static int __devinit mxsfb_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mxsfb_platform_data *pdata = pdev->dev.platform_data;
|
||||
struct resource *res;
|
||||
struct mxsfb_info *host;
|
||||
struct fb_info *fb_info;
|
||||
struct fb_modelist *modelist;
|
||||
int i, ret;
|
||||
|
||||
if (!pdata) {
|
||||
dev_err(&pdev->dev, "No platformdata. Giving up\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
dev_err(&pdev->dev, "Cannot get memory IO resource\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!request_mem_region(res->start, resource_size(res), pdev->name))
|
||||
return -EBUSY;
|
||||
|
||||
fb_info = framebuffer_alloc(sizeof(struct mxsfb_info), &pdev->dev);
|
||||
if (!fb_info) {
|
||||
dev_err(&pdev->dev, "Failed to allocate fbdev\n");
|
||||
ret = -ENOMEM;
|
||||
goto error_alloc_info;
|
||||
}
|
||||
|
||||
host = to_imxfb_host(fb_info);
|
||||
|
||||
host->base = ioremap(res->start, resource_size(res));
|
||||
if (!host->base) {
|
||||
dev_err(&pdev->dev, "ioremap failed\n");
|
||||
ret = -ENOMEM;
|
||||
goto error_ioremap;
|
||||
}
|
||||
|
||||
host->pdev = pdev;
|
||||
platform_set_drvdata(pdev, host);
|
||||
|
||||
host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data];
|
||||
|
||||
host->clk = clk_get(&host->pdev->dev, NULL);
|
||||
if (IS_ERR(host->clk)) {
|
||||
ret = PTR_ERR(host->clk);
|
||||
goto error_getclock;
|
||||
}
|
||||
|
||||
fb_info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
|
||||
if (!fb_info->pseudo_palette) {
|
||||
ret = -ENOMEM;
|
||||
goto error_pseudo_pallette;
|
||||
}
|
||||
|
||||
INIT_LIST_HEAD(&fb_info->modelist);
|
||||
|
||||
ret = mxsfb_init_fbinfo(host);
|
||||
if (ret != 0)
|
||||
goto error_init_fb;
|
||||
|
||||
for (i = 0; i < pdata->mode_count; i++)
|
||||
fb_add_videomode(&pdata->mode_list[i], &fb_info->modelist);
|
||||
|
||||
modelist = list_first_entry(&fb_info->modelist,
|
||||
struct fb_modelist, list);
|
||||
fb_videomode_to_var(&fb_info->var, &modelist->mode);
|
||||
|
||||
/* init the color fields */
|
||||
mxsfb_check_var(&fb_info->var, fb_info);
|
||||
|
||||
platform_set_drvdata(pdev, fb_info);
|
||||
|
||||
ret = register_framebuffer(fb_info);
|
||||
if (ret != 0) {
|
||||
dev_err(&pdev->dev,"Failed to register framebuffer\n");
|
||||
goto error_register;
|
||||
}
|
||||
|
||||
if (!host->enabled) {
|
||||
writel(0, host->base + LCDC_CTRL);
|
||||
mxsfb_set_par(fb_info);
|
||||
mxsfb_enable_controller(fb_info);
|
||||
}
|
||||
|
||||
dev_info(&pdev->dev, "initialized\n");
|
||||
|
||||
return 0;
|
||||
|
||||
error_register:
|
||||
if (host->enabled)
|
||||
clk_disable(host->clk);
|
||||
fb_destroy_modelist(&fb_info->modelist);
|
||||
error_init_fb:
|
||||
kfree(fb_info->pseudo_palette);
|
||||
error_pseudo_pallette:
|
||||
clk_put(host->clk);
|
||||
error_getclock:
|
||||
iounmap(host->base);
|
||||
error_ioremap:
|
||||
framebuffer_release(fb_info);
|
||||
error_alloc_info:
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit mxsfb_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct fb_info *fb_info = platform_get_drvdata(pdev);
|
||||
struct mxsfb_info *host = to_imxfb_host(fb_info);
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
|
||||
if (host->enabled)
|
||||
mxsfb_disable_controller(fb_info);
|
||||
|
||||
unregister_framebuffer(fb_info);
|
||||
kfree(fb_info->pseudo_palette);
|
||||
mxsfb_free_videomem(host);
|
||||
iounmap(host->base);
|
||||
clk_put(host->clk);
|
||||
|
||||
framebuffer_release(fb_info);
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_device_id mxsfb_devtype[] = {
|
||||
{
|
||||
.name = "imx23-fb",
|
||||
.driver_data = MXSFB_V3,
|
||||
}, {
|
||||
.name = "imx28-fb",
|
||||
.driver_data = MXSFB_V4,
|
||||
}, {
|
||||
/* sentinel */
|
||||
}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, mxsfb_devtype);
|
||||
|
||||
static struct platform_driver mxsfb_driver = {
|
||||
.probe = mxsfb_probe,
|
||||
.remove = __devexit_p(mxsfb_remove),
|
||||
.id_table = mxsfb_devtype,
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init mxsfb_init(void)
|
||||
{
|
||||
return platform_driver_register(&mxsfb_driver);
|
||||
}
|
||||
|
||||
static void __exit mxsfb_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&mxsfb_driver);
|
||||
}
|
||||
|
||||
module_init(mxsfb_init);
|
||||
module_exit(mxsfb_exit);
|
||||
|
||||
MODULE_DESCRIPTION("Freescale mxs framebuffer driver");
|
||||
MODULE_AUTHOR("Sascha Hauer, Pengutronix");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue
Block a user