forked from Minki/linux
drm/amdgpu: remove unncessary code in psp v10 ring init func
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -110,7 +110,6 @@ int psp_v10_0_prep_cmd_buf(struct amdgpu_firmware_info *ucode, struct psp_gfx_cm
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int psp_v10_0_ring_init(struct psp_context *psp, enum psp_ring_type ring_type)
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{
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int ret = 0;
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unsigned int psp_ring_reg = 0;
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struct psp_ring *ring;
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struct amdgpu_device *adev = psp->adev;
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@ -130,25 +129,6 @@ int psp_v10_0_ring_init(struct psp_context *psp, enum psp_ring_type ring_type)
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return ret;
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}
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/* Write low address of the ring to C2PMSG_69 */
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psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);
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WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);
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/* Write high address of the ring to C2PMSG_70 */
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psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr);
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WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg);
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/* Write size of ring to C2PMSG_71 */
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psp_ring_reg = ring->ring_size;
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WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg);
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/* Write the ring initialization command to C2PMSG_64 */
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psp_ring_reg = ring_type;
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psp_ring_reg = psp_ring_reg << 16;
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WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);
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/* Wait for response flag (bit 31) in C2PMSG_64 */
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psp_ring_reg = 0;
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while ((psp_ring_reg & 0x80000000) == 0) {
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psp_ring_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64);
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}
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return 0;
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}
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