drm/amdgpu: Add missing lb_vblank_lead_lines setup to DCE-6 path.
This apparently got lost when implementing the new DCE-6 support and would cause failures in pageflip scheduling and timestamping. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -979,7 +979,7 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev,
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u32 priority_a_mark = 0, priority_b_mark = 0;
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u32 priority_a_cnt = PRIORITY_OFF;
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u32 priority_b_cnt = PRIORITY_OFF;
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u32 tmp, arb_control3;
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u32 tmp, arb_control3, lb_vblank_lead_lines = 0;
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fixed20_12 a, b, c;
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if (amdgpu_crtc->base.enabled && num_heads && mode) {
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@ -1091,6 +1091,8 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev,
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c.full = dfixed_div(c, a);
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priority_b_mark = dfixed_trunc(c);
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priority_b_cnt |= priority_b_mark & PRIORITY_MARK_MASK;
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lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay);
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}
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/* select wm A */
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@ -1120,6 +1122,9 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev,
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/* save values for DPM */
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amdgpu_crtc->line_time = line_time;
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amdgpu_crtc->wm_high = latency_watermark_a;
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/* Save number of lines the linebuffer leads before the scanout */
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amdgpu_crtc->lb_vblank_lead_lines = lb_vblank_lead_lines;
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}
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/* watermark setup */
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