forked from Minki/linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
The forcedeth changes had a conflict with the conversion over to atomic u64 statistics in net-next. The libertas cfg.c code had a conflict with the bss reference counting fix by John Linville in net-next. Conflicts: drivers/net/ethernet/nvidia/forcedeth.c drivers/net/wireless/libertas/cfg.c
This commit is contained in:
David S. Miller
commit
efd0bf97de
2
.mailmap
2
.mailmap
@ -68,6 +68,7 @@ Juha Yrjola <juha.yrjola@solidboot.com>
|
||||
Kay Sievers <kay.sievers@vrfy.org>
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Kenneth W Chen <kenneth.w.chen@intel.com>
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Koushik <raghavendra.koushik@neterion.com>
|
||||
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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||||
Leonid I Ananiev <leonid.i.ananiev@intel.com>
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||||
Linas Vepstas <linas@austin.ibm.com>
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||||
Mark Brown <broonie@sirena.org.uk>
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@ -111,3 +112,4 @@ Uwe Kleine-König <ukl@pengutronix.de>
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||||
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
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||||
Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
|
||||
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
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||||
Yusuke Goda <goda.yusuke@renesas.com>
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||||
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@ -206,16 +206,3 @@ Description:
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when a discarded area is read the discard_zeroes_data
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||||
parameter will be set to one. Otherwise it will be 0 and
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the result of reading a discarded area is undefined.
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What: /sys/block/<disk>/alias
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Date: Aug 2011
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Contact: Nao Nishijima <nao.nishijima.xt@hitachi.com>
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||||
Description:
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A raw device name of a disk does not always point a same disk
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each boot-up time. Therefore, users have to use persistent
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device names, which udev creates when the kernel finds a disk,
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instead of raw device name. However, kernel doesn't show those
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||||
persistent names on its messages (e.g. dmesg).
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This file can store an alias of the disk and it would be
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appeared in kernel messages if it is set. A disk can have an
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||||
alias which length is up to 255bytes. Users can use alphabets,
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numbers, "-" and "_" in alias name. This file is writeonce.
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@ -32,7 +32,7 @@
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The Linux DRM layer contains code intended to support the needs
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of complex graphics devices, usually containing programmable
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pipelines well suited to 3D graphics acceleration. Graphics
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drivers in the kernel can make use of DRM functions to make
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drivers in the kernel may make use of DRM functions to make
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tasks like memory management, interrupt handling and DMA easier,
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and provide a uniform interface to applications.
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</para>
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@ -57,10 +57,10 @@
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existing drivers.
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</para>
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<para>
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First, we'll go over some typical driver initialization
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First, we go over some typical driver initialization
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requirements, like setting up command buffers, creating an
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initial output configuration, and initializing core services.
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Subsequent sections will cover core internals in more detail,
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Subsequent sections cover core internals in more detail,
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providing implementation notes and examples.
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</para>
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<para>
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@ -74,7 +74,7 @@
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</para>
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<para>
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The core of every DRM driver is struct drm_driver. Drivers
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will typically statically initialize a drm_driver structure,
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typically statically initialize a drm_driver structure,
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then pass it to drm_init() at load time.
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</para>
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@ -88,8 +88,8 @@
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</para>
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<programlisting>
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static struct drm_driver driver = {
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/* don't use mtrr's here, the Xserver or user space app should
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* deal with them for intel hardware.
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/* Don't use MTRRs here; the Xserver or userspace app should
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* deal with them for Intel hardware.
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*/
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.driver_features =
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DRIVER_USE_AGP | DRIVER_REQUIRE_AGP |
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@ -154,8 +154,8 @@
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</programlisting>
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<para>
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In the example above, taken from the i915 DRM driver, the driver
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sets several flags indicating what core features it supports.
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We'll go over the individual callbacks in later sections. Since
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sets several flags indicating what core features it supports;
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we go over the individual callbacks in later sections. Since
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flags indicate which features your driver supports to the DRM
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core, you need to set most of them prior to calling drm_init(). Some,
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like DRIVER_MODESET can be set later based on user supplied parameters,
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@ -203,8 +203,8 @@
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<term>DRIVER_HAVE_IRQ</term><term>DRIVER_IRQ_SHARED</term>
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<listitem>
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<para>
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DRIVER_HAVE_IRQ indicates whether the driver has a IRQ
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handler, DRIVER_IRQ_SHARED indicates whether the device &
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DRIVER_HAVE_IRQ indicates whether the driver has an IRQ
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handler. DRIVER_IRQ_SHARED indicates whether the device &
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handler support shared IRQs (note that this is required of
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PCI drivers).
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</para>
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@ -214,8 +214,8 @@
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<term>DRIVER_DMA_QUEUE</term>
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<listitem>
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<para>
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If the driver queues DMA requests and completes them
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asynchronously, this flag should be set. Deprecated.
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Should be set if the driver queues DMA requests and completes them
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asynchronously. Deprecated.
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</para>
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</listitem>
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</varlistentry>
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@ -238,7 +238,7 @@
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</variablelist>
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<para>
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In this specific case, the driver requires AGP and supports
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IRQs. DMA, as we'll see, is handled by device specific ioctls
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IRQs. DMA, as discussed later, is handled by device-specific ioctls
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in this case. It also supports the kernel mode setting APIs, though
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unlike in the actual i915 driver source, this example unconditionally
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exports KMS capability.
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@ -269,36 +269,34 @@
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initial output configuration.
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</para>
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<para>
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Note that the tasks performed at driver load time must not
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conflict with DRM client requirements. For instance, if user
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If compatibility is a concern (e.g. with drivers converted over
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to the new interfaces from the old ones), care must be taken to
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prevent device initialization and control that is incompatible with
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currently active userspace drivers. For instance, if user
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level mode setting drivers are in use, it would be problematic
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to perform output discovery & configuration at load time.
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Likewise, if pre-memory management aware user level drivers are
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Likewise, if user-level drivers unaware of memory management are
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in use, memory management and command buffer setup may need to
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be omitted. These requirements are driver specific, and care
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be omitted. These requirements are driver-specific, and care
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needs to be taken to keep both old and new applications and
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libraries working. The i915 driver supports the "modeset"
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module parameter to control whether advanced features are
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enabled at load time or in legacy fashion. If compatibility is
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||||
a concern (e.g. with drivers converted over to the new interfaces
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||||
from the old ones), care must be taken to prevent incompatible
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||||
device initialization and control with the currently active
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userspace drivers.
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||||
enabled at load time or in legacy fashion.
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</para>
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||||
<sect2>
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<title>Driver private & performance counters</title>
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<para>
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The driver private hangs off the main drm_device structure and
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can be used for tracking various device specific bits of
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can be used for tracking various device-specific bits of
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information, like register offsets, command buffer status,
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register state for suspend/resume, etc. At load time, a
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driver can simply allocate one and set drm_device.dev_priv
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appropriately; at unload the driver can free it and set
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drm_device.dev_priv to NULL.
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driver may simply allocate one and set drm_device.dev_priv
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appropriately; it should be freed and drm_device.dev_priv set
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to NULL when the driver is unloaded.
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</para>
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<para>
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The DRM supports several counters which can be used for rough
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The DRM supports several counters which may be used for rough
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performance characterization. Note that the DRM stat counter
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system is not often used by applications, and supporting
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additional counters is completely optional.
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@ -307,15 +305,15 @@
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||||
These interfaces are deprecated and should not be used. If performance
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monitoring is desired, the developer should investigate and
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potentially enhance the kernel perf and tracing infrastructure to export
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GPU related performance information to performance monitoring
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tools and applications.
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GPU related performance information for consumption by performance
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monitoring tools and applications.
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||||
</para>
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</sect2>
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||||
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||||
<sect2>
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||||
<title>Configuring the device</title>
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||||
<para>
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||||
Obviously, device configuration will be device specific.
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Obviously, device configuration is device-specific.
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||||
However, there are several common operations: finding a
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||||
device's PCI resources, mapping them, and potentially setting
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up an IRQ handler.
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||||
@ -323,10 +321,10 @@
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||||
<para>
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||||
Finding & mapping resources is fairly straightforward. The
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||||
DRM wrapper functions, drm_get_resource_start() and
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||||
drm_get_resource_len() can be used to find BARs on the given
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||||
drm_get_resource_len(), may be used to find BARs on the given
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||||
drm_device struct. Once those values have been retrieved, the
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driver load function can call drm_addmap() to create a new
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mapping for the BAR in question. Note you'll probably want a
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mapping for the BAR in question. Note that you probably want a
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drm_local_map_t in your driver private structure to track any
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mappings you create.
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<!-- !Fdrivers/gpu/drm/drm_bufs.c drm_get_resource_* -->
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@ -335,20 +333,20 @@
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<para>
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||||
if compatibility with other operating systems isn't a concern
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(DRM drivers can run under various BSD variants and OpenSolaris),
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||||
native Linux calls can be used for the above, e.g. pci_resource_*
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||||
native Linux calls may be used for the above, e.g. pci_resource_*
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and iomap*/iounmap. See the Linux device driver book for more
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||||
info.
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||||
</para>
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||||
<para>
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||||
Once you have a register map, you can use the DRM_READn() and
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||||
Once you have a register map, you may use the DRM_READn() and
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||||
DRM_WRITEn() macros to access the registers on your device, or
|
||||
use driver specific versions to offset into your MMIO space
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||||
relative to a driver specific base pointer (see I915_READ for
|
||||
example).
|
||||
use driver-specific versions to offset into your MMIO space
|
||||
relative to a driver-specific base pointer (see I915_READ for
|
||||
an example).
|
||||
</para>
|
||||
<para>
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||||
If your device supports interrupt generation, you may want to
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||||
setup an interrupt handler at driver load time as well. This
|
||||
set up an interrupt handler when the driver is loaded. This
|
||||
is done using the drm_irq_install() function. If your device
|
||||
supports vertical blank interrupts, it should call
|
||||
drm_vblank_init() to initialize the core vblank handling code before
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@ -357,7 +355,7 @@
|
||||
</para>
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||||
<!--!Fdrivers/char/drm/drm_irq.c drm_irq_install-->
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||||
<para>
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||||
Once your interrupt handler is registered (it'll use your
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||||
Once your interrupt handler is registered (it uses your
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||||
drm_driver.irq_handler as the actual interrupt handling
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||||
function), you can safely enable interrupts on your device,
|
||||
assuming any other state your interrupt handler uses is also
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||||
@ -371,10 +369,10 @@
|
||||
using the pci_map_rom() call, a convenience function that
|
||||
takes care of mapping the actual ROM, whether it has been
|
||||
shadowed into memory (typically at address 0xc0000) or exists
|
||||
on the PCI device in the ROM BAR. Note that once you've
|
||||
mapped the ROM and extracted any necessary information, be
|
||||
sure to unmap it; on many devices the ROM address decoder is
|
||||
shared with other BARs, so leaving it mapped can cause
|
||||
on the PCI device in the ROM BAR. Note that after the ROM
|
||||
has been mapped and any necessary information has been extracted,
|
||||
it should be unmapped; on many devices, the ROM address decoder is
|
||||
shared with other BARs, so leaving it mapped could cause
|
||||
undesired behavior like hangs or memory corruption.
|
||||
<!--!Fdrivers/pci/rom.c pci_map_rom-->
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||||
</para>
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||||
@ -389,9 +387,9 @@
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||||
should support a memory manager.
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||||
</para>
|
||||
<para>
|
||||
If your driver supports memory management (it should!), you'll
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||||
If your driver supports memory management (it should!), you
|
||||
need to set that up at load time as well. How you initialize
|
||||
it depends on which memory manager you're using, TTM or GEM.
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||||
it depends on which memory manager you're using: TTM or GEM.
|
||||
</para>
|
||||
<sect3>
|
||||
<title>TTM initialization</title>
|
||||
@ -401,7 +399,7 @@
|
||||
and devices with dedicated video RAM (VRAM), i.e. most discrete
|
||||
graphics devices. If your device has dedicated RAM, supporting
|
||||
TTM is desirable. TTM also integrates tightly with your
|
||||
driver specific buffer execution function. See the radeon
|
||||
driver-specific buffer execution function. See the radeon
|
||||
driver for examples.
|
||||
</para>
|
||||
<para>
|
||||
@ -429,21 +427,21 @@
|
||||
created by the memory manager at runtime. Your global TTM should
|
||||
have a type of TTM_GLOBAL_TTM_MEM. The size field for the global
|
||||
object should be sizeof(struct ttm_mem_global), and the init and
|
||||
release hooks should point at your driver specific init and
|
||||
release routines, which will probably eventually call
|
||||
ttm_mem_global_init and ttm_mem_global_release respectively.
|
||||
release hooks should point at your driver-specific init and
|
||||
release routines, which probably eventually call
|
||||
ttm_mem_global_init and ttm_mem_global_release, respectively.
|
||||
</para>
|
||||
<para>
|
||||
Once your global TTM accounting structure is set up and initialized
|
||||
(done by calling ttm_global_item_ref on the global object you
|
||||
just created), you'll need to create a buffer object TTM to
|
||||
by calling ttm_global_item_ref() on it,
|
||||
you need to create a buffer object TTM to
|
||||
provide a pool for buffer object allocation by clients and the
|
||||
kernel itself. The type of this object should be TTM_GLOBAL_TTM_BO,
|
||||
and its size should be sizeof(struct ttm_bo_global). Again,
|
||||
driver specific init and release functions can be provided,
|
||||
likely eventually calling ttm_bo_global_init and
|
||||
ttm_bo_global_release, respectively. Also like the previous
|
||||
object, ttm_global_item_ref is used to create an initial reference
|
||||
driver-specific init and release functions may be provided,
|
||||
likely eventually calling ttm_bo_global_init() and
|
||||
ttm_bo_global_release(), respectively. Also, like the previous
|
||||
object, ttm_global_item_ref() is used to create an initial reference
|
||||
count for the TTM, which will call your initialization function.
|
||||
</para>
|
||||
</sect3>
|
||||
@ -453,27 +451,26 @@
|
||||
GEM is an alternative to TTM, designed specifically for UMA
|
||||
devices. It has simpler initialization and execution requirements
|
||||
than TTM, but has no VRAM management capability. Core GEM
|
||||
initialization is comprised of a basic drm_mm_init call to create
|
||||
is initialized by calling drm_mm_init() to create
|
||||
a GTT DRM MM object, which provides an address space pool for
|
||||
object allocation. In a KMS configuration, the driver will
|
||||
need to allocate and initialize a command ring buffer following
|
||||
basic GEM initialization. Most UMA devices have a so-called
|
||||
object allocation. In a KMS configuration, the driver
|
||||
needs to allocate and initialize a command ring buffer following
|
||||
core GEM initialization. A UMA device usually has what is called a
|
||||
"stolen" memory region, which provides space for the initial
|
||||
framebuffer and large, contiguous memory regions required by the
|
||||
device. This space is not typically managed by GEM, and must
|
||||
device. This space is not typically managed by GEM, and it must
|
||||
be initialized separately into its own DRM MM object.
|
||||
</para>
|
||||
<para>
|
||||
Initialization will be driver specific, and will depend on
|
||||
the architecture of the device. In the case of Intel
|
||||
Initialization is driver-specific. In the case of Intel
|
||||
integrated graphics chips like 965GM, GEM initialization can
|
||||
be done by calling the internal GEM init function,
|
||||
i915_gem_do_init(). Since the 965GM is a UMA device
|
||||
(i.e. it doesn't have dedicated VRAM), GEM will manage
|
||||
(i.e. it doesn't have dedicated VRAM), GEM manages
|
||||
making regular RAM available for GPU operations. Memory set
|
||||
aside by the BIOS (called "stolen" memory by the i915
|
||||
driver) will be managed by the DRM memrange allocator; the
|
||||
rest of the aperture will be managed by GEM.
|
||||
driver) is managed by the DRM memrange allocator; the
|
||||
rest of the aperture is managed by GEM.
|
||||
<programlisting>
|
||||
/* Basic memrange allocator for stolen space (aka vram) */
|
||||
drm_memrange_init(&dev_priv->vram, 0, prealloc_size);
|
||||
@ -483,7 +480,7 @@
|
||||
<!--!Edrivers/char/drm/drm_memrange.c-->
|
||||
</para>
|
||||
<para>
|
||||
Once the memory manager has been set up, we can allocate the
|
||||
Once the memory manager has been set up, we may allocate the
|
||||
command buffer. In the i915 case, this is also done with a
|
||||
GEM function, i915_gem_init_ringbuffer().
|
||||
</para>
|
||||
@ -493,16 +490,25 @@
|
||||
<sect2>
|
||||
<title>Output configuration</title>
|
||||
<para>
|
||||
The final initialization task is output configuration. This involves
|
||||
finding and initializing the CRTCs, encoders and connectors
|
||||
for your device, creating an initial configuration and
|
||||
registering a framebuffer console driver.
|
||||
The final initialization task is output configuration. This involves:
|
||||
<itemizedlist>
|
||||
<listitem>
|
||||
Finding and initializing the CRTCs, encoders, and connectors
|
||||
for the device.
|
||||
</listitem>
|
||||
<listitem>
|
||||
Creating an initial configuration.
|
||||
</listitem>
|
||||
<listitem>
|
||||
Registering a framebuffer console driver.
|
||||
</listitem>
|
||||
</itemizedlist>
|
||||
</para>
|
||||
<sect3>
|
||||
<title>Output discovery and initialization</title>
|
||||
<para>
|
||||
Several core functions exist to create CRTCs, encoders and
|
||||
connectors, namely drm_crtc_init(), drm_connector_init() and
|
||||
Several core functions exist to create CRTCs, encoders, and
|
||||
connectors, namely: drm_crtc_init(), drm_connector_init(), and
|
||||
drm_encoder_init(), along with several "helper" functions to
|
||||
perform common tasks.
|
||||
</para>
|
||||
@ -555,10 +561,10 @@ void intel_crt_init(struct drm_device *dev)
|
||||
</programlisting>
|
||||
<para>
|
||||
In the example above (again, taken from the i915 driver), a
|
||||
CRT connector and encoder combination is created. A device
|
||||
specific i2c bus is also created, for fetching EDID data and
|
||||
CRT connector and encoder combination is created. A device-specific
|
||||
i2c bus is also created for fetching EDID data and
|
||||
performing monitor detection. Once the process is complete,
|
||||
the new connector is registered with sysfs, to make its
|
||||
the new connector is registered with sysfs to make its
|
||||
properties available to applications.
|
||||
</para>
|
||||
<sect4>
|
||||
@ -567,12 +573,12 @@ void intel_crt_init(struct drm_device *dev)
|
||||
Since many PC-class graphics devices have similar display output
|
||||
designs, the DRM provides a set of helper functions to make
|
||||
output management easier. The core helper routines handle
|
||||
encoder re-routing and disabling of unused functions following
|
||||
mode set. Using the helpers is optional, but recommended for
|
||||
encoder re-routing and the disabling of unused functions following
|
||||
mode setting. Using the helpers is optional, but recommended for
|
||||
devices with PC-style architectures (i.e. a set of display planes
|
||||
for feeding pixels to encoders which are in turn routed to
|
||||
connectors). Devices with more complex requirements needing
|
||||
finer grained management can opt to use the core callbacks
|
||||
finer grained management may opt to use the core callbacks
|
||||
directly.
|
||||
</para>
|
||||
<para>
|
||||
@ -580,17 +586,25 @@ void intel_crt_init(struct drm_device *dev)
|
||||
</para>
|
||||
</sect4>
|
||||
<para>
|
||||
For each encoder, CRTC and connector, several functions must
|
||||
be provided, depending on the object type. Encoder objects
|
||||
need to provide a DPMS (basically on/off) function, mode fixup
|
||||
(for converting requested modes into native hardware timings),
|
||||
and prepare, set and commit functions for use by the core DRM
|
||||
helper functions. Connector helpers need to provide mode fetch and
|
||||
validity functions as well as an encoder matching function for
|
||||
returning an ideal encoder for a given connector. The core
|
||||
connector functions include a DPMS callback, (deprecated)
|
||||
save/restore routines, detection, mode probing, property handling,
|
||||
and cleanup functions.
|
||||
Each encoder object needs to provide:
|
||||
<itemizedlist>
|
||||
<listitem>
|
||||
A DPMS (basically on/off) function.
|
||||
</listitem>
|
||||
<listitem>
|
||||
A mode-fixup function (for converting requested modes into
|
||||
native hardware timings).
|
||||
</listitem>
|
||||
<listitem>
|
||||
Functions (prepare, set, and commit) for use by the core DRM
|
||||
helper functions.
|
||||
</listitem>
|
||||
</itemizedlist>
|
||||
Connector helpers need to provide functions (mode-fetch, validity,
|
||||
and encoder-matching) for returning an ideal encoder for a given
|
||||
connector. The core connector functions include a DPMS callback,
|
||||
save/restore routines (deprecated), detection, mode probing,
|
||||
property handling, and cleanup functions.
|
||||
</para>
|
||||
<!--!Edrivers/char/drm/drm_crtc.h-->
|
||||
<!--!Edrivers/char/drm/drm_crtc.c-->
|
||||
@ -605,22 +619,33 @@ void intel_crt_init(struct drm_device *dev)
|
||||
<title>VBlank event handling</title>
|
||||
<para>
|
||||
The DRM core exposes two vertical blank related ioctls:
|
||||
DRM_IOCTL_WAIT_VBLANK and DRM_IOCTL_MODESET_CTL.
|
||||
<variablelist>
|
||||
<varlistentry>
|
||||
<term>DRM_IOCTL_WAIT_VBLANK</term>
|
||||
<listitem>
|
||||
<para>
|
||||
This takes a struct drm_wait_vblank structure as its argument,
|
||||
and it is used to block or request a signal when a specified
|
||||
vblank event occurs.
|
||||
</para>
|
||||
</listitem>
|
||||
</varlistentry>
|
||||
<varlistentry>
|
||||
<term>DRM_IOCTL_MODESET_CTL</term>
|
||||
<listitem>
|
||||
<para>
|
||||
This should be called by application level drivers before and
|
||||
after mode setting, since on many devices the vertical blank
|
||||
counter is reset at that time. Internally, the DRM snapshots
|
||||
the last vblank count when the ioctl is called with the
|
||||
_DRM_PRE_MODESET command, so that the counter won't go backwards
|
||||
(which is dealt with when _DRM_POST_MODESET is used).
|
||||
</para>
|
||||
</listitem>
|
||||
</varlistentry>
|
||||
</variablelist>
|
||||
<!--!Edrivers/char/drm/drm_irq.c-->
|
||||
</para>
|
||||
<para>
|
||||
DRM_IOCTL_WAIT_VBLANK takes a struct drm_wait_vblank structure
|
||||
as its argument, and is used to block or request a signal when a
|
||||
specified vblank event occurs.
|
||||
</para>
|
||||
<para>
|
||||
DRM_IOCTL_MODESET_CTL should be called by application level
|
||||
drivers before and after mode setting, since on many devices the
|
||||
vertical blank counter will be reset at that time. Internally,
|
||||
the DRM snapshots the last vblank count when the ioctl is called
|
||||
with the _DRM_PRE_MODESET command so that the counter won't go
|
||||
backwards (which is dealt with when _DRM_POST_MODESET is used).
|
||||
</para>
|
||||
<para>
|
||||
To support the functions above, the DRM core provides several
|
||||
helper functions for tracking vertical blank counters, and
|
||||
@ -632,24 +657,24 @@ void intel_crt_init(struct drm_device *dev)
|
||||
register. The enable and disable vblank callbacks should enable
|
||||
and disable vertical blank interrupts, respectively. In the
|
||||
absence of DRM clients waiting on vblank events, the core DRM
|
||||
code will use the disable_vblank() function to disable
|
||||
interrupts, which saves power. They'll be re-enabled again when
|
||||
code uses the disable_vblank() function to disable
|
||||
interrupts, which saves power. They are re-enabled again when
|
||||
a client calls the vblank wait ioctl above.
|
||||
</para>
|
||||
<para>
|
||||
Devices that don't provide a count register can simply use an
|
||||
A device that doesn't provide a count register may simply use an
|
||||
internal atomic counter incremented on every vertical blank
|
||||
interrupt, and can make their enable and disable vblank
|
||||
functions into no-ops.
|
||||
interrupt (and then treat the enable_vblank() and disable_vblank()
|
||||
callbacks as no-ops).
|
||||
</para>
|
||||
</sect1>
|
||||
|
||||
<sect1>
|
||||
<title>Memory management</title>
|
||||
<para>
|
||||
The memory manager lies at the heart of many DRM operations, and
|
||||
is also required to support advanced client features like OpenGL
|
||||
pbuffers. The DRM currently contains two memory managers, TTM
|
||||
The memory manager lies at the heart of many DRM operations; it
|
||||
is required to support advanced client features like OpenGL
|
||||
pbuffers. The DRM currently contains two memory managers: TTM
|
||||
and GEM.
|
||||
</para>
|
||||
|
||||
@ -679,41 +704,46 @@ void intel_crt_init(struct drm_device *dev)
|
||||
<para>
|
||||
GEM-enabled drivers must provide gem_init_object() and
|
||||
gem_free_object() callbacks to support the core memory
|
||||
allocation routines. They should also provide several driver
|
||||
specific ioctls to support command execution, pinning, buffer
|
||||
allocation routines. They should also provide several driver-specific
|
||||
ioctls to support command execution, pinning, buffer
|
||||
read & write, mapping, and domain ownership transfers.
|
||||
</para>
|
||||
<para>
|
||||
On a fundamental level, GEM involves several operations: memory
|
||||
allocation and freeing, command execution, and aperture management
|
||||
at command execution time. Buffer object allocation is relatively
|
||||
On a fundamental level, GEM involves several operations:
|
||||
<itemizedlist>
|
||||
<listitem>Memory allocation and freeing</listitem>
|
||||
<listitem>Command execution</listitem>
|
||||
<listitem>Aperture management at command execution time</listitem>
|
||||
</itemizedlist>
|
||||
Buffer object allocation is relatively
|
||||
straightforward and largely provided by Linux's shmem layer, which
|
||||
provides memory to back each object. When mapped into the GTT
|
||||
or used in a command buffer, the backing pages for an object are
|
||||
flushed to memory and marked write combined so as to be coherent
|
||||
with the GPU. Likewise, when the GPU finishes rendering to an object,
|
||||
if the CPU accesses it, it must be made coherent with the CPU's view
|
||||
with the GPU. Likewise, if the CPU accesses an object after the GPU
|
||||
has finished rendering to the object, then the object must be made
|
||||
coherent with the CPU's view
|
||||
of memory, usually involving GPU cache flushing of various kinds.
|
||||
This core CPU<->GPU coherency management is provided by the GEM
|
||||
set domain function, which evaluates an object's current domain and
|
||||
This core CPU<->GPU coherency management is provided by a
|
||||
device-specific ioctl, which evaluates an object's current domain and
|
||||
performs any necessary flushing or synchronization to put the object
|
||||
into the desired coherency domain (note that the object may be busy,
|
||||
i.e. an active render target; in that case the set domain function
|
||||
will block the client and wait for rendering to complete before
|
||||
i.e. an active render target; in that case, setting the domain
|
||||
blocks the client and waits for rendering to complete before
|
||||
performing any necessary flushing operations).
|
||||
</para>
|
||||
<para>
|
||||
Perhaps the most important GEM function is providing a command
|
||||
execution interface to clients. Client programs construct command
|
||||
buffers containing references to previously allocated memory objects
|
||||
and submit them to GEM. At that point, GEM will take care to bind
|
||||
buffers containing references to previously allocated memory objects,
|
||||
and then submit them to GEM. At that point, GEM takes care to bind
|
||||
all the objects into the GTT, execute the buffer, and provide
|
||||
necessary synchronization between clients accessing the same buffers.
|
||||
This often involves evicting some objects from the GTT and re-binding
|
||||
others (a fairly expensive operation), and providing relocation
|
||||
support which hides fixed GTT offsets from clients. Clients must
|
||||
take care not to submit command buffers that reference more objects
|
||||
than can fit in the GTT or GEM will reject them and no rendering
|
||||
than can fit in the GTT; otherwise, GEM will reject them and no rendering
|
||||
will occur. Similarly, if several objects in the buffer require
|
||||
fence registers to be allocated for correct rendering (e.g. 2D blits
|
||||
on pre-965 chips), care must be taken not to require more fence
|
||||
@ -729,7 +759,7 @@ void intel_crt_init(struct drm_device *dev)
|
||||
<title>Output management</title>
|
||||
<para>
|
||||
At the core of the DRM output management code is a set of
|
||||
structures representing CRTCs, encoders and connectors.
|
||||
structures representing CRTCs, encoders, and connectors.
|
||||
</para>
|
||||
<para>
|
||||
A CRTC is an abstraction representing a part of the chip that
|
||||
@ -765,21 +795,19 @@ void intel_crt_init(struct drm_device *dev)
|
||||
<sect1>
|
||||
<title>Framebuffer management</title>
|
||||
<para>
|
||||
In order to set a mode on a given CRTC, encoder and connector
|
||||
configuration, clients need to provide a framebuffer object which
|
||||
will provide a source of pixels for the CRTC to deliver to the encoder(s)
|
||||
and ultimately the connector(s) in the configuration. A framebuffer
|
||||
is fundamentally a driver specific memory object, made into an opaque
|
||||
handle by the DRM addfb function. Once an fb has been created this
|
||||
way it can be passed to the KMS mode setting routines for use in
|
||||
a configuration.
|
||||
Clients need to provide a framebuffer object which provides a source
|
||||
of pixels for a CRTC to deliver to the encoder(s) and ultimately the
|
||||
connector(s). A framebuffer is fundamentally a driver-specific memory
|
||||
object, made into an opaque handle by the DRM's addfb() function.
|
||||
Once a framebuffer has been created this way, it may be passed to the
|
||||
KMS mode setting routines for use in a completed configuration.
|
||||
</para>
|
||||
</sect1>
|
||||
|
||||
<sect1>
|
||||
<title>Command submission & fencing</title>
|
||||
<para>
|
||||
This should cover a few device specific command submission
|
||||
This should cover a few device-specific command submission
|
||||
implementations.
|
||||
</para>
|
||||
</sect1>
|
||||
@ -789,7 +817,7 @@ void intel_crt_init(struct drm_device *dev)
|
||||
<para>
|
||||
The DRM core provides some suspend/resume code, but drivers
|
||||
wanting full suspend/resume support should provide save() and
|
||||
restore() functions. These will be called at suspend,
|
||||
restore() functions. These are called at suspend,
|
||||
hibernate, or resume time, and should perform any state save or
|
||||
restore required by your device across suspend or hibernate
|
||||
states.
|
||||
@ -812,8 +840,8 @@ void intel_crt_init(struct drm_device *dev)
|
||||
<para>
|
||||
The DRM core exports several interfaces to applications,
|
||||
generally intended to be used through corresponding libdrm
|
||||
wrapper functions. In addition, drivers export device specific
|
||||
interfaces for use by userspace drivers & device aware
|
||||
wrapper functions. In addition, drivers export device-specific
|
||||
interfaces for use by userspace drivers & device-aware
|
||||
applications through ioctls and sysfs files.
|
||||
</para>
|
||||
<para>
|
||||
@ -822,8 +850,8 @@ void intel_crt_init(struct drm_device *dev)
|
||||
management, memory management, and output management.
|
||||
</para>
|
||||
<para>
|
||||
Cover generic ioctls and sysfs layout here. Only need high
|
||||
level info, since man pages will cover the rest.
|
||||
Cover generic ioctls and sysfs layout here. We only need high-level
|
||||
info, since man pages should cover the rest.
|
||||
</para>
|
||||
</chapter>
|
||||
|
||||
|
||||
@ -98,14 +98,12 @@ You must enable "SCSI tape drive support for Smart Array 5xxx" and
|
||||
"SCSI support" in your kernel configuration to be able to use SCSI
|
||||
tape drives with your Smart Array 5xxx controller.
|
||||
|
||||
Additionally, note that the driver will not engage the SCSI core at init
|
||||
time. The driver must be directed to dynamically engage the SCSI core via
|
||||
the /proc filesystem entry which the "block" side of the driver creates as
|
||||
/proc/driver/cciss/cciss* at runtime. This is because at driver init time,
|
||||
the SCSI core may not yet be initialized (because the driver is a block
|
||||
driver) and attempting to register it with the SCSI core in such a case
|
||||
would cause a hang. This is best done via an initialization script
|
||||
(typically in /etc/init.d, but could vary depending on distribution).
|
||||
Additionally, note that the driver will engage the SCSI core at init
|
||||
time if any tape drives or medium changers are detected. The driver may
|
||||
also be directed to dynamically engage the SCSI core via the /proc filesystem
|
||||
entry which the "block" side of the driver creates as
|
||||
/proc/driver/cciss/cciss* at runtime. This is best done via a script.
|
||||
|
||||
For example:
|
||||
|
||||
for x in /proc/driver/cciss/cciss[0-9]*
|
||||
|
||||
@ -33,9 +33,9 @@ demonstrate this problem using nested bash shells:
|
||||
|
||||
From a second, unrelated bash shell:
|
||||
$ kill -SIGSTOP 16690
|
||||
$ kill -SIGCONT 16990
|
||||
$ kill -SIGCONT 16690
|
||||
|
||||
<at this point 16990 exits and causes 16644 to exit too>
|
||||
<at this point 16690 exits and causes 16644 to exit too>
|
||||
|
||||
This happens because bash can observe both signals and choose how it
|
||||
responds to them.
|
||||
|
||||
@ -349,6 +349,7 @@ STAC92HD83*
|
||||
ref Reference board
|
||||
mic-ref Reference board with power management for ports
|
||||
dell-s14 Dell laptop
|
||||
dell-vostro-3500 Dell Vostro 3500 laptop
|
||||
hp HP laptops with (inverted) mute-LED
|
||||
hp-dv7-4000 HP dv-7 4000
|
||||
auto BIOS setup (default)
|
||||
|
||||
@ -579,7 +579,7 @@ Development Tree
|
||||
~~~~~~~~~~~~~~~~
|
||||
The latest development codes for HD-audio are found on sound git tree:
|
||||
|
||||
- git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6.git
|
||||
- git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
|
||||
|
||||
The master branch or for-next branches can be used as the main
|
||||
development branches in general while the HD-audio specific patches
|
||||
@ -594,7 +594,7 @@ is, installed via the usual spells: configure, make and make
|
||||
install(-modules). See INSTALL in the package. The snapshot tarballs
|
||||
are found at:
|
||||
|
||||
- ftp://ftp.kernel.org/pub/linux/kernel/people/tiwai/snapshot/
|
||||
- ftp://ftp.suse.com/pub/people/tiwai/snapshot/
|
||||
|
||||
|
||||
Sending a Bug Report
|
||||
@ -696,7 +696,7 @@ via hda-verb won't change the mixer value.
|
||||
|
||||
The hda-verb program is found in the ftp directory:
|
||||
|
||||
- ftp://ftp.kernel.org/pub/linux/kernel/people/tiwai/misc/
|
||||
- ftp://ftp.suse.com/pub/people/tiwai/misc/
|
||||
|
||||
Also a git repository is available:
|
||||
|
||||
@ -764,7 +764,7 @@ operation, the jack plugging simulation, etc.
|
||||
|
||||
The package is found in:
|
||||
|
||||
- ftp://ftp.kernel.org/pub/linux/kernel/people/tiwai/misc/
|
||||
- ftp://ftp.suse.com/pub/people/tiwai/misc/
|
||||
|
||||
A git repository is available:
|
||||
|
||||
|
||||
2
Kbuild
2
Kbuild
@ -92,7 +92,7 @@ always += missing-syscalls
|
||||
targets += missing-syscalls
|
||||
|
||||
quiet_cmd_syscalls = CALL $<
|
||||
cmd_syscalls = $(CONFIG_SHELL) $< $(CC) $(c_flags)
|
||||
cmd_syscalls = $(CONFIG_SHELL) $< $(CC) $(c_flags) $(missing_syscalls_flags)
|
||||
|
||||
missing-syscalls: scripts/checksyscalls.sh $(offsets-file) FORCE
|
||||
$(call cmd,syscalls)
|
||||
|
||||
30
MAINTAINERS
30
MAINTAINERS
@ -1106,6 +1106,7 @@ F: drivers/media/video/s5p-fimc/
|
||||
ARM/SAMSUNG S5P SERIES Multi Format Codec (MFC) SUPPORT
|
||||
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||
M: Kamil Debski <k.debski@samsung.com>
|
||||
M: Jeongtae Park <jtp.park@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
@ -1926,9 +1927,11 @@ S: Maintained
|
||||
F: drivers/connector/
|
||||
|
||||
CONTROL GROUPS (CGROUPS)
|
||||
M: Paul Menage <paul@paulmenage.org>
|
||||
M: Tejun Heo <tj@kernel.org>
|
||||
M: Li Zefan <lizf@cn.fujitsu.com>
|
||||
L: containers@lists.linux-foundation.org
|
||||
L: cgroups@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup.git
|
||||
S: Maintained
|
||||
F: include/linux/cgroup*
|
||||
F: kernel/cgroup*
|
||||
@ -2342,6 +2345,13 @@ S: Supported
|
||||
F: drivers/gpu/drm/i915
|
||||
F: include/drm/i915*
|
||||
|
||||
DRM DRIVERS FOR EXYNOS
|
||||
M: Inki Dae <inki.dae@samsung.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Supported
|
||||
F: drivers/gpu/drm/exynos
|
||||
F: include/drm/exynos*
|
||||
|
||||
DSCC4 DRIVER
|
||||
M: Francois Romieu <romieu@fr.zoreil.com>
|
||||
L: netdev@vger.kernel.org
|
||||
@ -2576,7 +2586,7 @@ S: Maintained
|
||||
F: drivers/net/ethernet/i825xx/eexpress.*
|
||||
|
||||
ETHERNET BRIDGE
|
||||
M: Stephen Hemminger <shemminger@linux-foundation.org>
|
||||
M: Stephen Hemminger <shemminger@vyatta.com>
|
||||
L: bridge@lists.linux-foundation.org
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.linuxfoundation.org/en/Net:Bridge
|
||||
@ -4296,6 +4306,7 @@ MEMORY RESOURCE CONTROLLER
|
||||
M: Balbir Singh <bsingharora@gmail.com>
|
||||
M: Daisuke Nishimura <nishimura@mxp.nes.nec.co.jp>
|
||||
M: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
|
||||
L: cgroups@vger.kernel.org
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/memcontrol.c
|
||||
@ -4329,7 +4340,7 @@ MIPS
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
W: http://www.linux-mips.org/
|
||||
T: git git://git.linux-mips.org/pub/scm/linux.git
|
||||
T: git git://git.linux-mips.org/pub/scm/ralf/linux.git
|
||||
Q: http://patchwork.linux-mips.org/project/linux-mips/list/
|
||||
S: Supported
|
||||
F: Documentation/mips/
|
||||
@ -4462,7 +4473,7 @@ S: Supported
|
||||
F: drivers/infiniband/hw/nes/
|
||||
|
||||
NETEM NETWORK EMULATOR
|
||||
M: Stephen Hemminger <shemminger@linux-foundation.org>
|
||||
M: Stephen Hemminger <shemminger@vyatta.com>
|
||||
L: netem@lists.linux-foundation.org
|
||||
S: Maintained
|
||||
F: net/sched/sch_netem.c
|
||||
@ -4939,7 +4950,7 @@ F: drivers/char/ppdev.c
|
||||
F: include/linux/ppdev.h
|
||||
|
||||
PARAVIRT_OPS INTERFACE
|
||||
M: Jeremy Fitzhardinge <jeremy@xensource.com>
|
||||
M: Jeremy Fitzhardinge <jeremy@goop.org>
|
||||
M: Chris Wright <chrisw@sous-sol.org>
|
||||
M: Alok Kataria <akataria@vmware.com>
|
||||
M: Rusty Russell <rusty@rustcorp.com.au>
|
||||
@ -5977,7 +5988,7 @@ S: Maintained
|
||||
F: drivers/usb/misc/sisusbvga/
|
||||
|
||||
SKGE, SKY2 10/100/1000 GIGABIT ETHERNET DRIVERS
|
||||
M: Stephen Hemminger <shemminger@linux-foundation.org>
|
||||
M: Stephen Hemminger <shemminger@vyatta.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/marvell/sk*
|
||||
@ -6122,7 +6133,7 @@ F: sound/
|
||||
SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC)
|
||||
M: Liam Girdwood <lrg@ti.com>
|
||||
M: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound-2.6.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
W: http://alsa-project.org/main/index.php/ASoC
|
||||
S: Supported
|
||||
@ -7398,8 +7409,8 @@ S: Maintained
|
||||
F: arch/x86/kernel/cpu/mcheck/*
|
||||
|
||||
XEN HYPERVISOR INTERFACE
|
||||
M: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
|
||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
M: Jeremy Fitzhardinge <jeremy@goop.org>
|
||||
L: xen-devel@lists.xensource.com (moderated for non-subscribers)
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
S: Supported
|
||||
@ -7432,7 +7443,8 @@ F: drivers/xen/*swiotlb*
|
||||
|
||||
XFS FILESYSTEM
|
||||
P: Silicon Graphics Inc
|
||||
M: Alex Elder <aelder@sgi.com>
|
||||
M: Ben Myers <bpm@sgi.com>
|
||||
M: Alex Elder <elder@kernel.org>
|
||||
M: xfs-masters@oss.sgi.com
|
||||
L: xfs@oss.sgi.com
|
||||
W: http://oss.sgi.com/projects/xfs
|
||||
|
||||
2
Makefile
2
Makefile
@ -1,7 +1,7 @@
|
||||
VERSION = 3
|
||||
PATCHLEVEL = 2
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc2
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
||||
@ -65,6 +65,8 @@ $(obj)/%.dtb: $(src)/dts/%.dts
|
||||
|
||||
$(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
|
||||
|
||||
clean-files := *.dtb
|
||||
|
||||
quiet_cmd_uimage = UIMAGE $@
|
||||
cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A arm -O linux -T kernel \
|
||||
-C none -a $(LOADADDR) -e $(STARTADDR) \
|
||||
|
||||
@ -22,11 +22,10 @@
|
||||
sdhci@c8000400 {
|
||||
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
||||
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||
power-gpios = <&gpio 155 0>; /* gpio PT3 */
|
||||
power-gpios = <&gpio 70 0>; /* gpio PI6 */
|
||||
};
|
||||
|
||||
sdhci@c8000600 {
|
||||
power-gpios = <&gpio 70 0>; /* gpio PI6 */
|
||||
support-8bit;
|
||||
};
|
||||
};
|
||||
|
||||
@ -20,6 +20,8 @@
|
||||
#ifndef __ASM_ARM_HARDWARE_L2X0_H
|
||||
#define __ASM_ARM_HARDWARE_L2X0_H
|
||||
|
||||
#include <linux/errno.h>
|
||||
|
||||
#define L2X0_CACHE_ID 0x000
|
||||
#define L2X0_CACHE_TYPE 0x004
|
||||
#define L2X0_CTRL 0x100
|
||||
|
||||
@ -13,6 +13,7 @@
|
||||
struct tag;
|
||||
struct meminfo;
|
||||
struct sys_timer;
|
||||
struct pt_regs;
|
||||
|
||||
struct machine_desc {
|
||||
unsigned int nr; /* architecture number */
|
||||
|
||||
@ -402,6 +402,8 @@
|
||||
#define __NR_syncfs (__NR_SYSCALL_BASE+373)
|
||||
#define __NR_sendmmsg (__NR_SYSCALL_BASE+374)
|
||||
#define __NR_setns (__NR_SYSCALL_BASE+375)
|
||||
#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
|
||||
#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
|
||||
@ -385,6 +385,8 @@
|
||||
CALL(sys_syncfs)
|
||||
CALL(sys_sendmmsg)
|
||||
/* 375 */ CALL(sys_setns)
|
||||
CALL(sys_process_vm_readv)
|
||||
CALL(sys_process_vm_writev)
|
||||
#ifndef syscalls_counted
|
||||
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
|
||||
#define syscalls_counted
|
||||
|
||||
@ -360,7 +360,7 @@ __secondary_data:
|
||||
* r13 = *virtual* address to jump to upon completion
|
||||
*/
|
||||
__enable_mmu:
|
||||
#ifdef CONFIG_ALIGNMENT_TRAP
|
||||
#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
|
||||
orr r0, r0, #CR_A
|
||||
#else
|
||||
bic r0, r0, #CR_A
|
||||
|
||||
@ -32,24 +32,6 @@ static atomic_t waiting_for_crash_ipi;
|
||||
|
||||
int machine_kexec_prepare(struct kimage *image)
|
||||
{
|
||||
unsigned long page_list;
|
||||
void *reboot_code_buffer;
|
||||
page_list = image->head & PAGE_MASK;
|
||||
|
||||
reboot_code_buffer = page_address(image->control_code_page);
|
||||
|
||||
/* Prepare parameters for reboot_code_buffer*/
|
||||
kexec_start_address = image->start;
|
||||
kexec_indirection_page = page_list;
|
||||
kexec_mach_type = machine_arch_type;
|
||||
kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
|
||||
|
||||
/* copy our kernel relocation code to the control code page */
|
||||
memcpy(reboot_code_buffer,
|
||||
relocate_new_kernel, relocate_new_kernel_size);
|
||||
|
||||
flush_icache_range((unsigned long) reboot_code_buffer,
|
||||
(unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -100,14 +82,31 @@ void (*kexec_reinit)(void);
|
||||
|
||||
void machine_kexec(struct kimage *image)
|
||||
{
|
||||
unsigned long page_list;
|
||||
unsigned long reboot_code_buffer_phys;
|
||||
void *reboot_code_buffer;
|
||||
|
||||
|
||||
page_list = image->head & PAGE_MASK;
|
||||
|
||||
/* we need both effective and real address here */
|
||||
reboot_code_buffer_phys =
|
||||
page_to_pfn(image->control_code_page) << PAGE_SHIFT;
|
||||
reboot_code_buffer = page_address(image->control_code_page);
|
||||
|
||||
/* Prepare parameters for reboot_code_buffer*/
|
||||
kexec_start_address = image->start;
|
||||
kexec_indirection_page = page_list;
|
||||
kexec_mach_type = machine_arch_type;
|
||||
kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
|
||||
|
||||
/* copy our kernel relocation code to the control code page */
|
||||
memcpy(reboot_code_buffer,
|
||||
relocate_new_kernel, relocate_new_kernel_size);
|
||||
|
||||
|
||||
flush_icache_range((unsigned long) reboot_code_buffer,
|
||||
(unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
|
||||
printk(KERN_INFO "Bye!\n");
|
||||
|
||||
if (kexec_reinit)
|
||||
|
||||
@ -461,8 +461,10 @@ static void __init setup_processor(void)
|
||||
cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
|
||||
proc_arch[cpu_architecture()], cr_alignment);
|
||||
|
||||
sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
|
||||
sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
|
||||
snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
|
||||
list->arch_name, ENDIANNESS);
|
||||
snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
|
||||
list->elf_name, ENDIANNESS);
|
||||
elf_hwcap = list->elf_hwcap;
|
||||
#ifndef CONFIG_ARM_THUMB
|
||||
elf_hwcap &= ~HWCAP_THUMB;
|
||||
|
||||
@ -98,7 +98,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
||||
* USB HS Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
|
||||
#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
|
||||
|
||||
static struct resource usba_udc_resources[] = {
|
||||
[0] = {
|
||||
@ -1021,8 +1021,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
|
||||
#if defined(CONFIG_SERIAL_ATMEL)
|
||||
static struct resource dbgu_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_VA_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.start = AT91_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
@ -1035,7 +1035,6 @@ static struct resource dbgu_resources[] = {
|
||||
static struct atmel_uart_data dbgu_data = {
|
||||
.use_dma_tx = 0,
|
||||
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
|
||||
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
|
||||
};
|
||||
|
||||
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
@ -877,8 +877,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
|
||||
#if defined(CONFIG_SERIAL_ATMEL)
|
||||
static struct resource dbgu_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_VA_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.start = AT91_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
@ -891,7 +891,6 @@ static struct resource dbgu_resources[] = {
|
||||
static struct atmel_uart_data dbgu_data = {
|
||||
.use_dma_tx = 0,
|
||||
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
|
||||
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
|
||||
};
|
||||
|
||||
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
@ -837,8 +837,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
|
||||
#if defined(CONFIG_SERIAL_ATMEL)
|
||||
static struct resource dbgu_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_VA_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.start = AT91_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
@ -851,7 +851,6 @@ static struct resource dbgu_resources[] = {
|
||||
static struct atmel_uart_data dbgu_data = {
|
||||
.use_dma_tx = 0,
|
||||
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
|
||||
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
|
||||
};
|
||||
|
||||
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
@ -816,8 +816,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
|
||||
#if defined(CONFIG_SERIAL_ATMEL)
|
||||
static struct resource dbgu_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_VA_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.start = AT91_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
@ -830,7 +830,6 @@ static struct resource dbgu_resources[] = {
|
||||
static struct atmel_uart_data dbgu_data = {
|
||||
.use_dma_tx = 0,
|
||||
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
|
||||
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
|
||||
};
|
||||
|
||||
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
@ -1196,8 +1196,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
|
||||
|
||||
static struct resource dbgu_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_VA_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.start = AT91_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
@ -1210,7 +1210,6 @@ static struct resource dbgu_resources[] = {
|
||||
static struct atmel_uart_data dbgu_data = {
|
||||
.use_dma_tx = 0,
|
||||
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
|
||||
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
|
||||
};
|
||||
|
||||
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
@ -197,7 +197,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {}
|
||||
* USB HS Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
|
||||
#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
|
||||
static struct resource usba_udc_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9G45_UDPHS_FIFO,
|
||||
@ -1332,8 +1332,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
|
||||
#if defined(CONFIG_SERIAL_ATMEL)
|
||||
static struct resource dbgu_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_VA_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.start = AT91_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
@ -1346,7 +1346,6 @@ static struct resource dbgu_resources[] = {
|
||||
static struct atmel_uart_data dbgu_data = {
|
||||
.use_dma_tx = 0,
|
||||
.use_dma_rx = 0,
|
||||
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
|
||||
};
|
||||
|
||||
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
@ -75,7 +75,7 @@ void __init at91_add_device_hdmac(void) {}
|
||||
* USB HS Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
|
||||
#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
|
||||
|
||||
static struct resource usba_udc_resources[] = {
|
||||
[0] = {
|
||||
@ -908,8 +908,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
|
||||
#if defined(CONFIG_SERIAL_ATMEL)
|
||||
static struct resource dbgu_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_VA_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.start = AT91_BASE_SYS + AT91_DBGU,
|
||||
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
@ -922,7 +922,6 @@ static struct resource dbgu_resources[] = {
|
||||
static struct atmel_uart_data dbgu_data = {
|
||||
.use_dma_tx = 0,
|
||||
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
|
||||
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
|
||||
};
|
||||
|
||||
static u64 dbgu_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
@ -384,7 +384,7 @@ static struct spi_board_info yl9200_spi_devices[] = {
|
||||
#include <video/s1d13xxxfb.h>
|
||||
|
||||
|
||||
static void __init yl9200_init_video(void)
|
||||
static void yl9200_init_video(void)
|
||||
{
|
||||
/* NWAIT Signal */
|
||||
at91_set_A_periph(AT91_PIN_PC6, 0);
|
||||
|
||||
@ -21,6 +21,8 @@
|
||||
#ifndef __ASM_ARCH_VMALLOC_H
|
||||
#define __ASM_ARCH_VMALLOC_H
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK)
|
||||
|
||||
#endif
|
||||
|
||||
@ -235,7 +235,7 @@ void __init bcmring_init_timer(void)
|
||||
*/
|
||||
bcmring_clocksource_init();
|
||||
|
||||
sp804_clockevents_register(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
|
||||
sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
|
||||
}
|
||||
|
||||
struct sys_timer bcmring_timer = {
|
||||
|
||||
@ -36,6 +36,7 @@
|
||||
#include <linux/mm.h>
|
||||
#include <linux/pfn.h>
|
||||
#include <linux/atomic.h>
|
||||
#include <linux/sched.h>
|
||||
#include <mach/dma.h>
|
||||
|
||||
/* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */
|
||||
|
||||
@ -1,22 +1,26 @@
|
||||
zreladdr-$(CONFIG_ARCH_MX1) += 0x08008000
|
||||
params_phys-$(CONFIG_ARCH_MX1) := 0x08000100
|
||||
initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000
|
||||
zreladdr-$(CONFIG_SOC_IMX1) += 0x08008000
|
||||
params_phys-$(CONFIG_SOC_IMX1) := 0x08000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX1) := 0x08800000
|
||||
|
||||
zreladdr-$(CONFIG_MACH_MX21) += 0xC0008000
|
||||
params_phys-$(CONFIG_MACH_MX21) := 0xC0000100
|
||||
initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000
|
||||
zreladdr-$(CONFIG_SOC_IMX21) += 0xC0008000
|
||||
params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000
|
||||
|
||||
zreladdr-$(CONFIG_ARCH_MX25) += 0x80008000
|
||||
params_phys-$(CONFIG_ARCH_MX25) := 0x80000100
|
||||
initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000
|
||||
zreladdr-$(CONFIG_SOC_IMX25) += 0x80008000
|
||||
params_phys-$(CONFIG_SOC_IMX25) := 0x80000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000
|
||||
|
||||
zreladdr-$(CONFIG_MACH_MX27) += 0xA0008000
|
||||
params_phys-$(CONFIG_MACH_MX27) := 0xA0000100
|
||||
initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000
|
||||
zreladdr-$(CONFIG_SOC_IMX27) += 0xA0008000
|
||||
params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000
|
||||
|
||||
zreladdr-$(CONFIG_ARCH_MX3) += 0x80008000
|
||||
params_phys-$(CONFIG_ARCH_MX3) := 0x80000100
|
||||
initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000
|
||||
zreladdr-$(CONFIG_SOC_IMX31) += 0x80008000
|
||||
params_phys-$(CONFIG_SOC_IMX31) := 0x80000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000
|
||||
|
||||
zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
|
||||
params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
|
||||
|
||||
zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
|
||||
params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
|
||||
|
||||
@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
|
||||
return -EINVAL;
|
||||
|
||||
max_div = ((d->bm_pred >> d->bp_pred) + 1) *
|
||||
((d->bm_pred >> d->bp_pred) + 1);
|
||||
((d->bm_podf >> d->bp_podf) + 1);
|
||||
|
||||
div = parent_rate / rate;
|
||||
if (div == 0)
|
||||
@ -2002,6 +2002,21 @@ int __init mx6q_clocks_init(void)
|
||||
clk_set_rate(&asrc_serial_clk, 1500000);
|
||||
clk_set_rate(&enfc_clk, 11000000);
|
||||
|
||||
/*
|
||||
* Before pinctrl API is available, we have to rely on the pad
|
||||
* configuration set up by bootloader. For usdhc example here,
|
||||
* u-boot sets up the pads for 49.5 MHz case, and we have to lower
|
||||
* the usdhc clock from 198 to 49.5 MHz to match the pad configuration.
|
||||
*
|
||||
* FIXME: This is should be removed after pinctrl API is available.
|
||||
* At that time, usdhc driver can call pinctrl API to change pad
|
||||
* configuration dynamically per different usdhc clock settings.
|
||||
*/
|
||||
clk_set_rate(&usdhc1_clk, 49500000);
|
||||
clk_set_rate(&usdhc2_clk, 49500000);
|
||||
clk_set_rate(&usdhc3_clk, 49500000);
|
||||
clk_set_rate(&usdhc4_clk, 49500000);
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
|
||||
base = of_iomap(np, 0);
|
||||
WARN_ON(!base);
|
||||
|
||||
@ -15,6 +15,8 @@ obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
|
||||
obj-$(CONFIG_MSM_SMD) += last_radio_log.o
|
||||
obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
|
||||
|
||||
CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
|
||||
|
||||
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
|
||||
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
|
||||
|
||||
|
||||
@ -42,8 +42,8 @@
|
||||
|
||||
extern struct sys_timer msm_timer;
|
||||
|
||||
static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag,
|
||||
char **cmdline, struct meminfo *mi)
|
||||
static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
|
||||
struct meminfo *mi)
|
||||
{
|
||||
for (; tag->hdr.size; tag = tag_next(tag))
|
||||
if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
|
||||
|
||||
@ -32,8 +32,8 @@
|
||||
|
||||
#include "devices.h"
|
||||
|
||||
static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag,
|
||||
char **cmdline, struct meminfo *mi)
|
||||
static void __init msm8960_fixup(struct tag *tag, char **cmdline,
|
||||
struct meminfo *mi)
|
||||
{
|
||||
for (; tag->hdr.size; tag = tag_next(tag))
|
||||
if (tag->hdr.tag == ATAG_MEM &&
|
||||
|
||||
@ -28,8 +28,8 @@
|
||||
#include <mach/board.h>
|
||||
#include <mach/msm_iomap.h>
|
||||
|
||||
static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag,
|
||||
char **cmdline, struct meminfo *mi)
|
||||
static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
|
||||
struct meminfo *mi)
|
||||
{
|
||||
for (; tag->hdr.size; tag = tag_next(tag))
|
||||
if (tag->hdr.tag == ATAG_MEM &&
|
||||
|
||||
@ -180,6 +180,9 @@ static u32 smc(u32 cmd_addr)
|
||||
__asmeq("%1", "r0")
|
||||
__asmeq("%2", "r1")
|
||||
__asmeq("%3", "r2")
|
||||
#ifdef REQUIRES_SEC
|
||||
".arch_extension sec\n"
|
||||
#endif
|
||||
"smc #0 @ switch to secure world\n"
|
||||
: "=r" (r0)
|
||||
: "r" (r0), "r" (r1), "r" (r2)
|
||||
|
||||
@ -1281,9 +1281,9 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
|
||||
NULL, NULL, &ipg_clk, &gpt_ipg_clk);
|
||||
|
||||
DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET,
|
||||
NULL, NULL, &ipg_clk, NULL);
|
||||
NULL, NULL, &ipg_perclk, NULL);
|
||||
DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,
|
||||
NULL, NULL, &ipg_clk, NULL);
|
||||
NULL, NULL, &ipg_perclk, NULL);
|
||||
|
||||
/* I2C */
|
||||
DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
|
||||
@ -1634,6 +1634,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,
|
||||
unsigned long *ckih1, unsigned long *ckih2)
|
||||
{
|
||||
@ -1671,3 +1672,4 @@ int __init mx53_clocks_init_dt(void)
|
||||
clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
|
||||
return mx53_clocks_init(ckil, osc, ckih1, ckih2);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -471,7 +471,8 @@ static void __init mx28evk_init(void)
|
||||
"mmc0-slot-power");
|
||||
if (ret)
|
||||
pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
|
||||
mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
|
||||
else
|
||||
mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
|
||||
|
||||
ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
|
||||
"mmc1-slot-power");
|
||||
@ -480,7 +481,6 @@ static void __init mx28evk_init(void)
|
||||
else
|
||||
mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
|
||||
|
||||
mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
|
||||
mx28_add_rtc_stmp3xxx();
|
||||
|
||||
gpio_led_register_device(0, &mx28evk_led_data);
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
|
||||
#define UART_SHIFT 2
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
|
||||
ldr \rp, =PICOXCELL_UART1_BASE
|
||||
.endm
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
#
|
||||
|
||||
# Common objects
|
||||
obj-y := timer.o console.o clock.o pm_runtime.o
|
||||
obj-y := timer.o console.o clock.o
|
||||
|
||||
# CPU objects
|
||||
obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
|
||||
|
||||
@ -515,14 +515,14 @@ static void __init ag5evm_init(void)
|
||||
/* enable MMCIF */
|
||||
gpio_request(GPIO_FN_MMCCLK0, NULL);
|
||||
gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_0, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_1, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_2, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_3, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_4, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_5, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_6, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_7, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
|
||||
gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
|
||||
gpio_request(GPIO_PORT208, NULL); /* Reset */
|
||||
gpio_direction_output(GPIO_PORT208, 1);
|
||||
|
||||
|
||||
@ -201,7 +201,7 @@ static struct physmap_flash_data nor_flash_data = {
|
||||
static struct resource nor_flash_resources[] = {
|
||||
[0] = {
|
||||
.start = 0x20000000, /* CS0 shadow instead of regular CS0 */
|
||||
.end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
|
||||
.end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
@ -48,6 +48,7 @@
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
#include <asm/traps.h>
|
||||
|
||||
/* SMSC 9220 */
|
||||
static struct resource smsc9220_resources[] = {
|
||||
[0] = {
|
||||
.start = 0x14000000, /* CS5A */
|
||||
@ -77,6 +78,7 @@ static struct platform_device eth_device = {
|
||||
.num_resources = ARRAY_SIZE(smsc9220_resources),
|
||||
};
|
||||
|
||||
/* KEYSC */
|
||||
static struct sh_keysc_info keysc_platdata = {
|
||||
.mode = SH_KEYSC_MODE_6,
|
||||
.scan_timing = 3,
|
||||
@ -120,6 +122,7 @@ static struct platform_device keysc_device = {
|
||||
},
|
||||
};
|
||||
|
||||
/* GPIO KEY */
|
||||
#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
|
||||
|
||||
static struct gpio_keys_button gpio_buttons[] = {
|
||||
@ -150,6 +153,7 @@ static struct platform_device gpio_keys_device = {
|
||||
},
|
||||
};
|
||||
|
||||
/* GPIO LED */
|
||||
#define GPIO_LED(n, g) { .name = n, .gpio = g }
|
||||
|
||||
static struct gpio_led gpio_leds[] = {
|
||||
@ -175,6 +179,7 @@ static struct platform_device gpio_leds_device = {
|
||||
},
|
||||
};
|
||||
|
||||
/* MMCIF */
|
||||
static struct resource mmcif_resources[] = {
|
||||
[0] = {
|
||||
.name = "MMCIF",
|
||||
@ -207,6 +212,7 @@ static struct platform_device mmcif_device = {
|
||||
.resource = mmcif_resources,
|
||||
};
|
||||
|
||||
/* SDHI0 */
|
||||
static struct sh_mobile_sdhi_info sdhi0_info = {
|
||||
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
|
||||
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
|
||||
@ -243,6 +249,7 @@ static struct platform_device sdhi0_device = {
|
||||
},
|
||||
};
|
||||
|
||||
/* SDHI1 */
|
||||
static struct sh_mobile_sdhi_info sdhi1_info = {
|
||||
.tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
|
||||
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
|
||||
|
||||
@ -476,7 +476,7 @@ static struct clk_ops fsidiv_clk_ops = {
|
||||
.disable = fsidiv_disable,
|
||||
};
|
||||
|
||||
static struct clk_mapping sh7372_fsidiva_clk_mapping = {
|
||||
static struct clk_mapping fsidiva_clk_mapping = {
|
||||
.phys = FSIDIVA,
|
||||
.len = 8,
|
||||
};
|
||||
@ -484,10 +484,10 @@ static struct clk_mapping sh7372_fsidiva_clk_mapping = {
|
||||
struct clk sh7372_fsidiva_clk = {
|
||||
.ops = &fsidiv_clk_ops,
|
||||
.parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
|
||||
.mapping = &sh7372_fsidiva_clk_mapping,
|
||||
.mapping = &fsidiva_clk_mapping,
|
||||
};
|
||||
|
||||
static struct clk_mapping sh7372_fsidivb_clk_mapping = {
|
||||
static struct clk_mapping fsidivb_clk_mapping = {
|
||||
.phys = FSIDIVB,
|
||||
.len = 8,
|
||||
};
|
||||
@ -495,7 +495,7 @@ static struct clk_mapping sh7372_fsidivb_clk_mapping = {
|
||||
struct clk sh7372_fsidivb_clk = {
|
||||
.ops = &fsidiv_clk_ops,
|
||||
.parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
|
||||
.mapping = &sh7372_fsidivb_clk_mapping,
|
||||
.mapping = &fsidivb_clk_mapping,
|
||||
};
|
||||
|
||||
static struct clk *late_main_clks[] = {
|
||||
|
||||
@ -26,65 +26,59 @@ void (*shmobile_cpuidle_modes[CPUIDLE_STATE_MAX])(void) = {
|
||||
};
|
||||
|
||||
static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
|
||||
struct cpuidle_state *state)
|
||||
struct cpuidle_driver *drv,
|
||||
int index)
|
||||
{
|
||||
ktime_t before, after;
|
||||
int requested_state = state - &dev->states[0];
|
||||
|
||||
dev->last_state = &dev->states[requested_state];
|
||||
before = ktime_get();
|
||||
|
||||
local_irq_disable();
|
||||
local_fiq_disable();
|
||||
|
||||
shmobile_cpuidle_modes[requested_state]();
|
||||
shmobile_cpuidle_modes[index]();
|
||||
|
||||
local_irq_enable();
|
||||
local_fiq_enable();
|
||||
|
||||
after = ktime_get();
|
||||
return ktime_to_ns(ktime_sub(after, before)) >> 10;
|
||||
dev->last_residency = ktime_to_ns(ktime_sub(after, before)) >> 10;
|
||||
|
||||
return index;
|
||||
}
|
||||
|
||||
static struct cpuidle_device shmobile_cpuidle_dev;
|
||||
static struct cpuidle_driver shmobile_cpuidle_driver = {
|
||||
.name = "shmobile_cpuidle",
|
||||
.owner = THIS_MODULE,
|
||||
.states[0] = {
|
||||
.name = "C1",
|
||||
.desc = "WFI",
|
||||
.exit_latency = 1,
|
||||
.target_residency = 1 * 2,
|
||||
.flags = CPUIDLE_FLAG_TIME_VALID,
|
||||
},
|
||||
.safe_state_index = 0, /* C1 */
|
||||
.state_count = 1,
|
||||
};
|
||||
|
||||
void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev);
|
||||
void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
|
||||
|
||||
static int shmobile_cpuidle_init(void)
|
||||
{
|
||||
struct cpuidle_device *dev = &shmobile_cpuidle_dev;
|
||||
struct cpuidle_state *state;
|
||||
struct cpuidle_driver *drv = &shmobile_cpuidle_driver;
|
||||
int i;
|
||||
|
||||
cpuidle_register_driver(&shmobile_cpuidle_driver);
|
||||
|
||||
for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
|
||||
dev->states[i].name[0] = '\0';
|
||||
dev->states[i].desc[0] = '\0';
|
||||
dev->states[i].enter = shmobile_cpuidle_enter;
|
||||
}
|
||||
|
||||
i = CPUIDLE_DRIVER_STATE_START;
|
||||
|
||||
state = &dev->states[i++];
|
||||
snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
|
||||
strncpy(state->desc, "WFI", CPUIDLE_DESC_LEN);
|
||||
state->exit_latency = 1;
|
||||
state->target_residency = 1 * 2;
|
||||
state->power_usage = 3;
|
||||
state->flags = 0;
|
||||
state->flags |= CPUIDLE_FLAG_TIME_VALID;
|
||||
|
||||
dev->safe_state = state;
|
||||
dev->state_count = i;
|
||||
for (i = 0; i < CPUIDLE_STATE_MAX; i++)
|
||||
drv->states[i].enter = shmobile_cpuidle_enter;
|
||||
|
||||
if (shmobile_cpuidle_setup)
|
||||
shmobile_cpuidle_setup(dev);
|
||||
shmobile_cpuidle_setup(drv);
|
||||
|
||||
cpuidle_register_driver(drv);
|
||||
|
||||
dev->state_count = drv->state_count;
|
||||
cpuidle_register_device(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
@ -9,9 +9,9 @@ extern int clk_init(void);
|
||||
extern void shmobile_handle_irq_intc(struct pt_regs *);
|
||||
extern void shmobile_handle_irq_gic(struct pt_regs *);
|
||||
extern struct platform_suspend_ops shmobile_suspend_ops;
|
||||
struct cpuidle_device;
|
||||
struct cpuidle_driver;
|
||||
extern void (*shmobile_cpuidle_modes[])(void);
|
||||
extern void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev);
|
||||
extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
|
||||
|
||||
extern void sh7367_init_irq(void);
|
||||
extern void sh7367_add_early_devices(void);
|
||||
|
||||
@ -470,6 +470,14 @@ enum {
|
||||
GPIO_FN_SDHICMD2_PU,
|
||||
GPIO_FN_MMCCMD0_PU,
|
||||
GPIO_FN_MMCCMD1_PU,
|
||||
GPIO_FN_MMCD0_0_PU,
|
||||
GPIO_FN_MMCD0_1_PU,
|
||||
GPIO_FN_MMCD0_2_PU,
|
||||
GPIO_FN_MMCD0_3_PU,
|
||||
GPIO_FN_MMCD0_4_PU,
|
||||
GPIO_FN_MMCD0_5_PU,
|
||||
GPIO_FN_MMCD0_6_PU,
|
||||
GPIO_FN_MMCD0_7_PU,
|
||||
GPIO_FN_FSIACK_PU,
|
||||
GPIO_FN_FSIAILR_PU,
|
||||
GPIO_FN_FSIAIBT_PU,
|
||||
|
||||
@ -21,68 +21,49 @@
|
||||
#include <linux/gpio.h>
|
||||
#include <mach/sh7367.h>
|
||||
|
||||
#define _1(fn, pfx, sfx) fn(pfx, sfx)
|
||||
|
||||
#define _10(fn, pfx, sfx) \
|
||||
_1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
|
||||
_1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
|
||||
_1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
|
||||
_1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
|
||||
_1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
|
||||
|
||||
#define _90(fn, pfx, sfx) \
|
||||
_10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
|
||||
_10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
|
||||
_10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
|
||||
_10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \
|
||||
_10(fn, pfx##9, sfx)
|
||||
|
||||
#define _273(fn, pfx, sfx) \
|
||||
_10(fn, pfx, sfx), _90(fn, pfx, sfx), \
|
||||
_10(fn, pfx##10, sfx), _90(fn, pfx##1, sfx), \
|
||||
_10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
|
||||
_10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
|
||||
_10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
|
||||
_10(fn, pfx##26, sfx), _1(fn, pfx##270, sfx), \
|
||||
_1(fn, pfx##271, sfx), _1(fn, pfx##272, sfx)
|
||||
|
||||
#define _PORT(pfx, sfx) pfx##_##sfx
|
||||
#define PORT_273(str) _273(_PORT, PORT, str)
|
||||
#define CPU_ALL_PORT(fn, pfx, sfx) \
|
||||
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
|
||||
PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
|
||||
PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
|
||||
PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
|
||||
PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
|
||||
PORT_10(fn, pfx##26, sfx), PORT_1(fn, pfx##270, sfx), \
|
||||
PORT_1(fn, pfx##271, sfx), PORT_1(fn, pfx##272, sfx)
|
||||
|
||||
enum {
|
||||
PINMUX_RESERVED = 0,
|
||||
|
||||
PINMUX_DATA_BEGIN,
|
||||
PORT_273(DATA), /* PORT0_DATA -> PORT272_DATA */
|
||||
PORT_ALL(DATA), /* PORT0_DATA -> PORT272_DATA */
|
||||
PINMUX_DATA_END,
|
||||
|
||||
PINMUX_INPUT_BEGIN,
|
||||
PORT_273(IN), /* PORT0_IN -> PORT272_IN */
|
||||
PORT_ALL(IN), /* PORT0_IN -> PORT272_IN */
|
||||
PINMUX_INPUT_END,
|
||||
|
||||
PINMUX_INPUT_PULLUP_BEGIN,
|
||||
PORT_273(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
|
||||
PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
|
||||
PINMUX_INPUT_PULLUP_END,
|
||||
|
||||
PINMUX_INPUT_PULLDOWN_BEGIN,
|
||||
PORT_273(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
|
||||
PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
|
||||
PINMUX_INPUT_PULLDOWN_END,
|
||||
|
||||
PINMUX_OUTPUT_BEGIN,
|
||||
PORT_273(OUT), /* PORT0_OUT -> PORT272_OUT */
|
||||
PORT_ALL(OUT), /* PORT0_OUT -> PORT272_OUT */
|
||||
PINMUX_OUTPUT_END,
|
||||
|
||||
PINMUX_FUNCTION_BEGIN,
|
||||
PORT_273(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
|
||||
PORT_273(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
|
||||
PORT_273(FN0), /* PORT0_FN0 -> PORT272_FN0 */
|
||||
PORT_273(FN1), /* PORT0_FN1 -> PORT272_FN1 */
|
||||
PORT_273(FN2), /* PORT0_FN2 -> PORT272_FN2 */
|
||||
PORT_273(FN3), /* PORT0_FN3 -> PORT272_FN3 */
|
||||
PORT_273(FN4), /* PORT0_FN4 -> PORT272_FN4 */
|
||||
PORT_273(FN5), /* PORT0_FN5 -> PORT272_FN5 */
|
||||
PORT_273(FN6), /* PORT0_FN6 -> PORT272_FN6 */
|
||||
PORT_273(FN7), /* PORT0_FN7 -> PORT272_FN7 */
|
||||
PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
|
||||
PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
|
||||
PORT_ALL(FN0), /* PORT0_FN0 -> PORT272_FN0 */
|
||||
PORT_ALL(FN1), /* PORT0_FN1 -> PORT272_FN1 */
|
||||
PORT_ALL(FN2), /* PORT0_FN2 -> PORT272_FN2 */
|
||||
PORT_ALL(FN3), /* PORT0_FN3 -> PORT272_FN3 */
|
||||
PORT_ALL(FN4), /* PORT0_FN4 -> PORT272_FN4 */
|
||||
PORT_ALL(FN5), /* PORT0_FN5 -> PORT272_FN5 */
|
||||
PORT_ALL(FN6), /* PORT0_FN6 -> PORT272_FN6 */
|
||||
PORT_ALL(FN7), /* PORT0_FN7 -> PORT272_FN7 */
|
||||
|
||||
MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
|
||||
PINMUX_FUNCTION_END,
|
||||
@ -327,41 +308,6 @@ enum {
|
||||
PINMUX_MARK_END,
|
||||
};
|
||||
|
||||
#define PORT_DATA_I(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
|
||||
|
||||
#define PORT_DATA_I_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD)
|
||||
|
||||
#define PORT_DATA_I_PU(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_I_PU_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_O(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
|
||||
|
||||
#define PORT_DATA_IO(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN)
|
||||
|
||||
#define PORT_DATA_IO_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD)
|
||||
|
||||
#define PORT_DATA_IO_PU(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_IO_PU_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
|
||||
|
||||
|
||||
static pinmux_enum_t pinmux_data[] = {
|
||||
|
||||
/* specify valid pin states for each pin in GPIO mode */
|
||||
@ -1098,13 +1044,9 @@ static pinmux_enum_t pinmux_data[] = {
|
||||
PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
|
||||
};
|
||||
|
||||
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
|
||||
#define GPIO_PORT_273() _273(_GPIO_PORT, , unused)
|
||||
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
|
||||
|
||||
static struct pinmux_gpio pinmux_gpios[] = {
|
||||
/* 49-1 -> 49-6 (GPIO) */
|
||||
GPIO_PORT_273(),
|
||||
GPIO_PORT_ALL(),
|
||||
|
||||
/* Special Pull-up / Pull-down Functions */
|
||||
GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
|
||||
@ -1345,22 +1287,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
|
||||
GPIO_FN(DIVLOCK),
|
||||
};
|
||||
|
||||
/* helper for top 4 bits in PORTnCR */
|
||||
#define PCRH(in, in_pd, in_pu, out) \
|
||||
0, (out), (in), 0, \
|
||||
0, 0, 0, 0, \
|
||||
0, 0, (in_pd), 0, \
|
||||
0, 0, (in_pu), 0
|
||||
|
||||
#define PORTCR(nr, reg) \
|
||||
{ PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
|
||||
PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
|
||||
PORT##nr##_IN_PU, PORT##nr##_OUT), \
|
||||
PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
|
||||
PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
|
||||
PORT##nr##_FN6, PORT##nr##_FN7 } \
|
||||
}
|
||||
|
||||
static struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
PORTCR(0, 0xe6050000), /* PORT0CR */
|
||||
PORTCR(1, 0xe6050001), /* PORT1CR */
|
||||
|
||||
@ -25,27 +25,13 @@
|
||||
#include <linux/gpio.h>
|
||||
#include <mach/sh7372.h>
|
||||
|
||||
#define _1(fn, pfx, sfx) fn(pfx, sfx)
|
||||
|
||||
#define _10(fn, pfx, sfx) \
|
||||
_1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
|
||||
_1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
|
||||
_1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
|
||||
_1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
|
||||
_1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
|
||||
|
||||
#define _80(fn, pfx, sfx) \
|
||||
_10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
|
||||
_10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
|
||||
_10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
|
||||
_10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx)
|
||||
|
||||
#define _190(fn, pfx, sfx) \
|
||||
_10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
|
||||
_10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
|
||||
|
||||
#define _PORT(pfx, sfx) pfx##_##sfx
|
||||
#define PORT_ALL(str) _190(_PORT, PORT, str)
|
||||
#define CPU_ALL_PORT(fn, pfx, sfx) \
|
||||
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
|
||||
PORT_10(fn, pfx##10, sfx), PORT_10(fn, pfx##11, sfx), \
|
||||
PORT_10(fn, pfx##12, sfx), PORT_10(fn, pfx##13, sfx), \
|
||||
PORT_10(fn, pfx##14, sfx), PORT_10(fn, pfx##15, sfx), \
|
||||
PORT_10(fn, pfx##16, sfx), PORT_10(fn, pfx##17, sfx), \
|
||||
PORT_10(fn, pfx##18, sfx), PORT_1(fn, pfx##190, sfx)
|
||||
|
||||
enum {
|
||||
PINMUX_RESERVED = 0,
|
||||
@ -381,108 +367,124 @@ enum {
|
||||
PINMUX_MARK_END,
|
||||
};
|
||||
|
||||
/* PORT_DATA_I_PD(nr) */
|
||||
#define _I___D(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD)
|
||||
|
||||
/* PORT_DATA_I_PU(nr) */
|
||||
#define _I__U_(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PU)
|
||||
|
||||
/* PORT_DATA_I_PU_PD(nr) */
|
||||
#define _I__UD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
|
||||
|
||||
/* PORT_DATA_O(nr) */
|
||||
#define __O___(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
|
||||
|
||||
/* PORT_DATA_IO(nr) */
|
||||
#define _IO___(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN)
|
||||
|
||||
/* PORT_DATA_IO_PD(nr) */
|
||||
#define _IO__D(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD)
|
||||
|
||||
/* PORT_DATA_IO_PU(nr) */
|
||||
#define _IO_U_(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PU)
|
||||
|
||||
/* PORT_DATA_IO_PU_PD(nr) */
|
||||
#define _IO_UD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
|
||||
|
||||
|
||||
static pinmux_enum_t pinmux_data[] = {
|
||||
|
||||
/* specify valid pin states for each pin in GPIO mode */
|
||||
PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1),
|
||||
PORT_DATA_O(2), PORT_DATA_I_PD(3),
|
||||
PORT_DATA_I_PD(4), PORT_DATA_I_PD(5),
|
||||
PORT_DATA_IO_PU_PD(6), PORT_DATA_I_PD(7),
|
||||
PORT_DATA_IO_PD(8), PORT_DATA_O(9),
|
||||
|
||||
_IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4),
|
||||
_I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9),
|
||||
PORT_DATA_O(10), PORT_DATA_O(11),
|
||||
PORT_DATA_IO_PU_PD(12), PORT_DATA_IO_PD(13),
|
||||
PORT_DATA_IO_PD(14), PORT_DATA_O(15),
|
||||
PORT_DATA_IO_PD(16), PORT_DATA_IO_PD(17),
|
||||
PORT_DATA_I_PD(18), PORT_DATA_IO(19),
|
||||
|
||||
__O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14),
|
||||
__O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19),
|
||||
PORT_DATA_IO(20), PORT_DATA_IO(21),
|
||||
PORT_DATA_IO(22), PORT_DATA_IO(23),
|
||||
PORT_DATA_IO(24), PORT_DATA_IO(25),
|
||||
PORT_DATA_IO(26), PORT_DATA_IO(27),
|
||||
PORT_DATA_IO(28), PORT_DATA_IO(29),
|
||||
|
||||
_IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24),
|
||||
_IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29),
|
||||
PORT_DATA_IO(30), PORT_DATA_IO(31),
|
||||
PORT_DATA_IO(32), PORT_DATA_IO(33),
|
||||
PORT_DATA_IO(34), PORT_DATA_IO(35),
|
||||
PORT_DATA_IO(36), PORT_DATA_IO(37),
|
||||
PORT_DATA_IO(38), PORT_DATA_IO(39),
|
||||
|
||||
_IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34),
|
||||
_IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39),
|
||||
PORT_DATA_IO(40), PORT_DATA_IO(41),
|
||||
PORT_DATA_IO(42), PORT_DATA_IO(43),
|
||||
PORT_DATA_IO(44), PORT_DATA_IO(45),
|
||||
PORT_DATA_IO_PU(46), PORT_DATA_IO_PU(47),
|
||||
PORT_DATA_IO_PU(48), PORT_DATA_IO_PU(49),
|
||||
|
||||
_IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44),
|
||||
_IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49),
|
||||
PORT_DATA_IO_PU(50), PORT_DATA_IO_PU(51),
|
||||
PORT_DATA_IO_PU(52), PORT_DATA_IO_PU(53),
|
||||
PORT_DATA_IO_PU(54), PORT_DATA_IO_PU(55),
|
||||
PORT_DATA_IO_PU(56), PORT_DATA_IO_PU(57),
|
||||
PORT_DATA_IO_PU(58), PORT_DATA_IO_PU(59),
|
||||
|
||||
_IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54),
|
||||
_IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59),
|
||||
PORT_DATA_IO_PU(60), PORT_DATA_IO_PU(61),
|
||||
PORT_DATA_IO(62), PORT_DATA_O(63),
|
||||
PORT_DATA_O(64), PORT_DATA_IO_PU(65),
|
||||
PORT_DATA_O(66), PORT_DATA_IO_PU(67), /*66?*/
|
||||
PORT_DATA_O(68), PORT_DATA_IO(69),
|
||||
|
||||
_IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64),
|
||||
_IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/
|
||||
PORT_DATA_IO(70), PORT_DATA_IO(71),
|
||||
PORT_DATA_O(72), PORT_DATA_I_PU(73),
|
||||
PORT_DATA_I_PU_PD(74), PORT_DATA_IO_PU_PD(75),
|
||||
PORT_DATA_IO_PU_PD(76), PORT_DATA_IO_PU_PD(77),
|
||||
PORT_DATA_IO_PU_PD(78), PORT_DATA_IO_PU_PD(79),
|
||||
|
||||
_IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74),
|
||||
_IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79),
|
||||
PORT_DATA_IO_PU_PD(80), PORT_DATA_IO_PU_PD(81),
|
||||
PORT_DATA_IO_PU_PD(82), PORT_DATA_IO_PU_PD(83),
|
||||
PORT_DATA_IO_PU_PD(84), PORT_DATA_IO_PU_PD(85),
|
||||
PORT_DATA_IO_PU_PD(86), PORT_DATA_IO_PU_PD(87),
|
||||
PORT_DATA_IO_PU_PD(88), PORT_DATA_IO_PU_PD(89),
|
||||
|
||||
_IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84),
|
||||
_IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89),
|
||||
PORT_DATA_IO_PU_PD(90), PORT_DATA_IO_PU_PD(91),
|
||||
PORT_DATA_IO_PU_PD(92), PORT_DATA_IO_PU_PD(93),
|
||||
PORT_DATA_IO_PU_PD(94), PORT_DATA_IO_PU_PD(95),
|
||||
PORT_DATA_IO_PU(96), PORT_DATA_IO_PU_PD(97),
|
||||
PORT_DATA_IO_PU_PD(98), PORT_DATA_O(99), /*99?*/
|
||||
|
||||
_IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94),
|
||||
_IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/
|
||||
PORT_DATA_IO_PD(100), PORT_DATA_IO_PD(101),
|
||||
PORT_DATA_IO_PD(102), PORT_DATA_IO_PD(103),
|
||||
PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105),
|
||||
PORT_DATA_IO_PU(106), PORT_DATA_IO_PU(107),
|
||||
PORT_DATA_IO_PU(108), PORT_DATA_IO_PU(109),
|
||||
|
||||
_IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104),
|
||||
_IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109),
|
||||
PORT_DATA_IO_PU(110), PORT_DATA_IO_PU(111),
|
||||
PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
|
||||
PORT_DATA_IO_PU(114), PORT_DATA_IO_PU(115),
|
||||
PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
|
||||
PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119),
|
||||
|
||||
_IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114),
|
||||
_IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119),
|
||||
PORT_DATA_IO_PU(120), PORT_DATA_IO_PD(121),
|
||||
PORT_DATA_IO_PD(122), PORT_DATA_IO_PD(123),
|
||||
PORT_DATA_IO_PD(124), PORT_DATA_IO_PD(125),
|
||||
PORT_DATA_IO_PD(126), PORT_DATA_IO_PD(127),
|
||||
PORT_DATA_IO_PD(128), PORT_DATA_IO_PU_PD(129),
|
||||
|
||||
_IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124),
|
||||
_IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129),
|
||||
PORT_DATA_IO_PU_PD(130), PORT_DATA_IO_PU_PD(131),
|
||||
PORT_DATA_IO_PU_PD(132), PORT_DATA_IO_PU_PD(133),
|
||||
PORT_DATA_IO_PU_PD(134), PORT_DATA_IO_PU_PD(135),
|
||||
PORT_DATA_IO_PD(136), PORT_DATA_IO_PD(137),
|
||||
PORT_DATA_IO_PD(138), PORT_DATA_IO_PD(139),
|
||||
|
||||
_IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134),
|
||||
_IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139),
|
||||
PORT_DATA_IO_PD(140), PORT_DATA_IO_PD(141),
|
||||
PORT_DATA_IO_PD(142), PORT_DATA_IO_PU_PD(143),
|
||||
PORT_DATA_IO_PD(144), PORT_DATA_IO_PD(145),
|
||||
PORT_DATA_IO_PD(146), PORT_DATA_IO_PD(147),
|
||||
PORT_DATA_IO_PD(148), PORT_DATA_IO_PD(149),
|
||||
|
||||
_IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144),
|
||||
_IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149),
|
||||
PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151),
|
||||
PORT_DATA_IO_PU_PD(152), PORT_DATA_I_PD(153),
|
||||
PORT_DATA_IO_PU_PD(154), PORT_DATA_I_PD(155),
|
||||
PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157),
|
||||
PORT_DATA_I_PD(158), PORT_DATA_IO_PD(159),
|
||||
|
||||
_IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154),
|
||||
_I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159),
|
||||
PORT_DATA_O(160), PORT_DATA_IO_PD(161),
|
||||
PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163),
|
||||
PORT_DATA_I_PD(164), PORT_DATA_IO_PD(165),
|
||||
PORT_DATA_I_PD(166), PORT_DATA_I_PD(167),
|
||||
PORT_DATA_I_PD(168), PORT_DATA_I_PD(169),
|
||||
|
||||
__O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164),
|
||||
_IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169),
|
||||
PORT_DATA_I_PD(170), PORT_DATA_O(171),
|
||||
PORT_DATA_IO_PU_PD(172), PORT_DATA_IO_PU_PD(173),
|
||||
PORT_DATA_IO_PU_PD(174), PORT_DATA_IO_PU_PD(175),
|
||||
PORT_DATA_IO_PU_PD(176), PORT_DATA_IO_PU_PD(177),
|
||||
PORT_DATA_IO_PU_PD(178), PORT_DATA_O(179),
|
||||
|
||||
_I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174),
|
||||
_IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179),
|
||||
PORT_DATA_IO_PU_PD(180), PORT_DATA_IO_PU_PD(181),
|
||||
PORT_DATA_IO_PU_PD(182), PORT_DATA_IO_PU_PD(183),
|
||||
PORT_DATA_IO_PU_PD(184), PORT_DATA_O(185),
|
||||
PORT_DATA_IO_PU_PD(186), PORT_DATA_IO_PU_PD(187),
|
||||
PORT_DATA_IO_PU_PD(188), PORT_DATA_IO_PU_PD(189),
|
||||
|
||||
_IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184),
|
||||
__O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189),
|
||||
|
||||
_IO_UD(190),
|
||||
PORT_DATA_IO_PU_PD(190),
|
||||
|
||||
/* IRQ */
|
||||
PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
|
||||
@ -926,10 +928,6 @@ static pinmux_enum_t pinmux_data[] = {
|
||||
PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
|
||||
};
|
||||
|
||||
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
|
||||
#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
|
||||
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
|
||||
|
||||
static struct pinmux_gpio pinmux_gpios[] = {
|
||||
|
||||
/* PORT */
|
||||
@ -1201,22 +1199,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
|
||||
GPIO_FN(SDENC_DV_CLKI),
|
||||
};
|
||||
|
||||
/* helper for top 4 bits in PORTnCR */
|
||||
#define PCRH(in, in_pd, in_pu, out) \
|
||||
0, (out), (in), 0, \
|
||||
0, 0, 0, 0, \
|
||||
0, 0, (in_pd), 0, \
|
||||
0, 0, (in_pu), 0
|
||||
|
||||
#define PORTCR(nr, reg) \
|
||||
{ PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
|
||||
PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
|
||||
PORT##nr##_IN_PU, PORT##nr##_OUT), \
|
||||
PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
|
||||
PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
|
||||
PORT##nr##_FN6, PORT##nr##_FN7 } \
|
||||
}
|
||||
|
||||
static struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
PORTCR(0, 0xE6051000), /* PORT0CR */
|
||||
PORTCR(1, 0xE6051001), /* PORT1CR */
|
||||
|
||||
@ -22,84 +22,65 @@
|
||||
#include <linux/gpio.h>
|
||||
#include <mach/sh7377.h>
|
||||
|
||||
#define _1(fn, pfx, sfx) fn(pfx, sfx)
|
||||
|
||||
#define _10(fn, pfx, sfx) \
|
||||
_1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
|
||||
_1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
|
||||
_1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
|
||||
_1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
|
||||
_1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
|
||||
|
||||
#define _90(fn, pfx, sfx) \
|
||||
_10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
|
||||
_10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
|
||||
_10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
|
||||
_10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \
|
||||
_10(fn, pfx##9, sfx)
|
||||
|
||||
#define _265(fn, pfx, sfx) \
|
||||
_10(fn, pfx, sfx), _90(fn, pfx, sfx), \
|
||||
_10(fn, pfx##10, sfx), \
|
||||
_1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \
|
||||
_1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \
|
||||
_1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \
|
||||
_1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \
|
||||
_1(fn, pfx##118, sfx), \
|
||||
_1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \
|
||||
_10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \
|
||||
_10(fn, pfx##15, sfx), \
|
||||
_1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \
|
||||
_1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \
|
||||
_1(fn, pfx##164, sfx), \
|
||||
_1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \
|
||||
_1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \
|
||||
_1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \
|
||||
_1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
|
||||
_10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
|
||||
_10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
|
||||
_10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
|
||||
_1(fn, pfx##260, sfx), _1(fn, pfx##261, sfx), \
|
||||
_1(fn, pfx##262, sfx), _1(fn, pfx##263, sfx), \
|
||||
_1(fn, pfx##264, sfx)
|
||||
|
||||
#define _PORT(pfx, sfx) pfx##_##sfx
|
||||
#define PORT_265(str) _265(_PORT, PORT, str)
|
||||
#define CPU_ALL_PORT(fn, pfx, sfx) \
|
||||
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
|
||||
PORT_10(fn, pfx##10, sfx), \
|
||||
PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
|
||||
PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
|
||||
PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
|
||||
PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
|
||||
PORT_1(fn, pfx##118, sfx), \
|
||||
PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
|
||||
PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
|
||||
PORT_10(fn, pfx##15, sfx), \
|
||||
PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
|
||||
PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
|
||||
PORT_1(fn, pfx##164, sfx), \
|
||||
PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
|
||||
PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
|
||||
PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
|
||||
PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
|
||||
PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
|
||||
PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
|
||||
PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
|
||||
PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx), \
|
||||
PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx), \
|
||||
PORT_1(fn, pfx##264, sfx)
|
||||
|
||||
enum {
|
||||
PINMUX_RESERVED = 0,
|
||||
|
||||
PINMUX_DATA_BEGIN,
|
||||
PORT_265(DATA), /* PORT0_DATA -> PORT264_DATA */
|
||||
PORT_ALL(DATA), /* PORT0_DATA -> PORT264_DATA */
|
||||
PINMUX_DATA_END,
|
||||
|
||||
PINMUX_INPUT_BEGIN,
|
||||
PORT_265(IN), /* PORT0_IN -> PORT264_IN */
|
||||
PORT_ALL(IN), /* PORT0_IN -> PORT264_IN */
|
||||
PINMUX_INPUT_END,
|
||||
|
||||
PINMUX_INPUT_PULLUP_BEGIN,
|
||||
PORT_265(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
|
||||
PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
|
||||
PINMUX_INPUT_PULLUP_END,
|
||||
|
||||
PINMUX_INPUT_PULLDOWN_BEGIN,
|
||||
PORT_265(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
|
||||
PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
|
||||
PINMUX_INPUT_PULLDOWN_END,
|
||||
|
||||
PINMUX_OUTPUT_BEGIN,
|
||||
PORT_265(OUT), /* PORT0_OUT -> PORT264_OUT */
|
||||
PORT_ALL(OUT), /* PORT0_OUT -> PORT264_OUT */
|
||||
PINMUX_OUTPUT_END,
|
||||
|
||||
PINMUX_FUNCTION_BEGIN,
|
||||
PORT_265(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
|
||||
PORT_265(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
|
||||
PORT_265(FN0), /* PORT0_FN0 -> PORT264_FN0 */
|
||||
PORT_265(FN1), /* PORT0_FN1 -> PORT264_FN1 */
|
||||
PORT_265(FN2), /* PORT0_FN2 -> PORT264_FN2 */
|
||||
PORT_265(FN3), /* PORT0_FN3 -> PORT264_FN3 */
|
||||
PORT_265(FN4), /* PORT0_FN4 -> PORT264_FN4 */
|
||||
PORT_265(FN5), /* PORT0_FN5 -> PORT264_FN5 */
|
||||
PORT_265(FN6), /* PORT0_FN6 -> PORT264_FN6 */
|
||||
PORT_265(FN7), /* PORT0_FN7 -> PORT264_FN7 */
|
||||
PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
|
||||
PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
|
||||
PORT_ALL(FN0), /* PORT0_FN0 -> PORT264_FN0 */
|
||||
PORT_ALL(FN1), /* PORT0_FN1 -> PORT264_FN1 */
|
||||
PORT_ALL(FN2), /* PORT0_FN2 -> PORT264_FN2 */
|
||||
PORT_ALL(FN3), /* PORT0_FN3 -> PORT264_FN3 */
|
||||
PORT_ALL(FN4), /* PORT0_FN4 -> PORT264_FN4 */
|
||||
PORT_ALL(FN5), /* PORT0_FN5 -> PORT264_FN5 */
|
||||
PORT_ALL(FN6), /* PORT0_FN6 -> PORT264_FN6 */
|
||||
PORT_ALL(FN7), /* PORT0_FN7 -> PORT264_FN7 */
|
||||
|
||||
MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
|
||||
MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
|
||||
@ -360,45 +341,6 @@ enum {
|
||||
PINMUX_MARK_END,
|
||||
};
|
||||
|
||||
#define PORT_DATA_I(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
|
||||
|
||||
#define PORT_DATA_I_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD)
|
||||
|
||||
#define PORT_DATA_I_PU(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_I_PU_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD, \
|
||||
PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_O(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT)
|
||||
|
||||
#define PORT_DATA_IO(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT, PORT##nr##_IN)
|
||||
|
||||
#define PORT_DATA_IO_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT, PORT##nr##_IN, \
|
||||
PORT##nr##_IN_PD)
|
||||
|
||||
#define PORT_DATA_IO_PU(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT, PORT##nr##_IN, \
|
||||
PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_IO_PU_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT, PORT##nr##_IN, \
|
||||
PORT##nr##_IN_PD, PORT##nr##_IN_PU)
|
||||
|
||||
static pinmux_enum_t pinmux_data[] = {
|
||||
/* specify valid pin states for each pin in GPIO mode */
|
||||
/* 55-1 (GPIO) */
|
||||
@ -1078,13 +1020,9 @@ static pinmux_enum_t pinmux_data[] = {
|
||||
PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
|
||||
};
|
||||
|
||||
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
|
||||
#define GPIO_PORT_265() _265(_GPIO_PORT, , unused)
|
||||
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
|
||||
|
||||
static struct pinmux_gpio pinmux_gpios[] = {
|
||||
/* 55-1 -> 55-5 (GPIO) */
|
||||
GPIO_PORT_265(),
|
||||
GPIO_PORT_ALL(),
|
||||
|
||||
/* Special Pull-up / Pull-down Functions */
|
||||
GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
|
||||
@ -1362,23 +1300,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
|
||||
GPIO_FN(RESETOUTS),
|
||||
};
|
||||
|
||||
/* helper for top 4 bits in PORTnCR */
|
||||
#define PCRH(in, in_pd, in_pu, out) \
|
||||
0, (out), (in), 0, \
|
||||
0, 0, 0, 0, \
|
||||
0, 0, (in_pd), 0, \
|
||||
0, 0, (in_pu), 0
|
||||
|
||||
#define PORTCR(nr, reg) \
|
||||
{ PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
|
||||
PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
|
||||
PORT##nr##_IN_PU, PORT##nr##_OUT), \
|
||||
PORT##nr##_FN0, PORT##nr##_FN1, \
|
||||
PORT##nr##_FN2, PORT##nr##_FN3, \
|
||||
PORT##nr##_FN4, PORT##nr##_FN5, \
|
||||
PORT##nr##_FN6, PORT##nr##_FN7 } \
|
||||
}
|
||||
|
||||
static struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
PORTCR(0, 0xe6050000), /* PORT0CR */
|
||||
PORTCR(1, 0xe6050001), /* PORT1CR */
|
||||
|
||||
@ -24,83 +24,71 @@
|
||||
#include <mach/sh73a0.h>
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#define _1(fn, pfx, sfx) fn(pfx, sfx)
|
||||
|
||||
#define _10(fn, pfx, sfx) \
|
||||
_1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
|
||||
_1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
|
||||
_1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
|
||||
_1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
|
||||
_1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
|
||||
|
||||
#define _310(fn, pfx, sfx) \
|
||||
_10(fn, pfx, sfx), _10(fn, pfx##1, sfx), \
|
||||
_10(fn, pfx##2, sfx), _10(fn, pfx##3, sfx), \
|
||||
_10(fn, pfx##4, sfx), _10(fn, pfx##5, sfx), \
|
||||
_10(fn, pfx##6, sfx), _10(fn, pfx##7, sfx), \
|
||||
_10(fn, pfx##8, sfx), _10(fn, pfx##9, sfx), \
|
||||
_10(fn, pfx##10, sfx), \
|
||||
_1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \
|
||||
_1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \
|
||||
_1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \
|
||||
_1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \
|
||||
_1(fn, pfx##118, sfx), \
|
||||
_1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \
|
||||
_10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \
|
||||
_10(fn, pfx##15, sfx), \
|
||||
_1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \
|
||||
_1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \
|
||||
_1(fn, pfx##164, sfx), \
|
||||
_1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \
|
||||
_1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \
|
||||
_1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \
|
||||
_1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
|
||||
_10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
|
||||
_10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
|
||||
_10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
|
||||
_10(fn, pfx##26, sfx), _10(fn, pfx##27, sfx), \
|
||||
_1(fn, pfx##280, sfx), _1(fn, pfx##281, sfx), \
|
||||
_1(fn, pfx##282, sfx), \
|
||||
_1(fn, pfx##288, sfx), _1(fn, pfx##289, sfx), \
|
||||
_10(fn, pfx##29, sfx), _10(fn, pfx##30, sfx)
|
||||
|
||||
#define _PORT(pfx, sfx) pfx##_##sfx
|
||||
#define PORT_310(str) _310(_PORT, PORT, str)
|
||||
#define CPU_ALL_PORT(fn, pfx, sfx) \
|
||||
PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
|
||||
PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \
|
||||
PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx), \
|
||||
PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx), \
|
||||
PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx), \
|
||||
PORT_10(fn, pfx##10, sfx), \
|
||||
PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
|
||||
PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
|
||||
PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
|
||||
PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
|
||||
PORT_1(fn, pfx##118, sfx), \
|
||||
PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
|
||||
PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
|
||||
PORT_10(fn, pfx##15, sfx), \
|
||||
PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
|
||||
PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
|
||||
PORT_1(fn, pfx##164, sfx), \
|
||||
PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
|
||||
PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
|
||||
PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
|
||||
PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
|
||||
PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
|
||||
PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
|
||||
PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
|
||||
PORT_10(fn, pfx##26, sfx), PORT_10(fn, pfx##27, sfx), \
|
||||
PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx), \
|
||||
PORT_1(fn, pfx##282, sfx), \
|
||||
PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx), \
|
||||
PORT_10(fn, pfx##29, sfx), PORT_10(fn, pfx##30, sfx)
|
||||
|
||||
enum {
|
||||
PINMUX_RESERVED = 0,
|
||||
|
||||
PINMUX_DATA_BEGIN,
|
||||
PORT_310(DATA), /* PORT0_DATA -> PORT309_DATA */
|
||||
PORT_ALL(DATA), /* PORT0_DATA -> PORT309_DATA */
|
||||
PINMUX_DATA_END,
|
||||
|
||||
PINMUX_INPUT_BEGIN,
|
||||
PORT_310(IN), /* PORT0_IN -> PORT309_IN */
|
||||
PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */
|
||||
PINMUX_INPUT_END,
|
||||
|
||||
PINMUX_INPUT_PULLUP_BEGIN,
|
||||
PORT_310(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */
|
||||
PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */
|
||||
PINMUX_INPUT_PULLUP_END,
|
||||
|
||||
PINMUX_INPUT_PULLDOWN_BEGIN,
|
||||
PORT_310(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */
|
||||
PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */
|
||||
PINMUX_INPUT_PULLDOWN_END,
|
||||
|
||||
PINMUX_OUTPUT_BEGIN,
|
||||
PORT_310(OUT), /* PORT0_OUT -> PORT309_OUT */
|
||||
PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */
|
||||
PINMUX_OUTPUT_END,
|
||||
|
||||
PINMUX_FUNCTION_BEGIN,
|
||||
PORT_310(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
|
||||
PORT_310(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
|
||||
PORT_310(FN0), /* PORT0_FN0 -> PORT309_FN0 */
|
||||
PORT_310(FN1), /* PORT0_FN1 -> PORT309_FN1 */
|
||||
PORT_310(FN2), /* PORT0_FN2 -> PORT309_FN2 */
|
||||
PORT_310(FN3), /* PORT0_FN3 -> PORT309_FN3 */
|
||||
PORT_310(FN4), /* PORT0_FN4 -> PORT309_FN4 */
|
||||
PORT_310(FN5), /* PORT0_FN5 -> PORT309_FN5 */
|
||||
PORT_310(FN6), /* PORT0_FN6 -> PORT309_FN6 */
|
||||
PORT_310(FN7), /* PORT0_FN7 -> PORT309_FN7 */
|
||||
PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
|
||||
PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
|
||||
PORT_ALL(FN0), /* PORT0_FN0 -> PORT309_FN0 */
|
||||
PORT_ALL(FN1), /* PORT0_FN1 -> PORT309_FN1 */
|
||||
PORT_ALL(FN2), /* PORT0_FN2 -> PORT309_FN2 */
|
||||
PORT_ALL(FN3), /* PORT0_FN3 -> PORT309_FN3 */
|
||||
PORT_ALL(FN4), /* PORT0_FN4 -> PORT309_FN4 */
|
||||
PORT_ALL(FN5), /* PORT0_FN5 -> PORT309_FN5 */
|
||||
PORT_ALL(FN6), /* PORT0_FN6 -> PORT309_FN6 */
|
||||
PORT_ALL(FN7), /* PORT0_FN7 -> PORT309_FN7 */
|
||||
|
||||
MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,
|
||||
MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,
|
||||
@ -508,6 +496,14 @@ enum {
|
||||
SDHICMD2_PU_MARK,
|
||||
MMCCMD0_PU_MARK,
|
||||
MMCCMD1_PU_MARK,
|
||||
MMCD0_0_PU_MARK,
|
||||
MMCD0_1_PU_MARK,
|
||||
MMCD0_2_PU_MARK,
|
||||
MMCD0_3_PU_MARK,
|
||||
MMCD0_4_PU_MARK,
|
||||
MMCD0_5_PU_MARK,
|
||||
MMCD0_6_PU_MARK,
|
||||
MMCD0_7_PU_MARK,
|
||||
FSIBISLD_PU_MARK,
|
||||
FSIACK_PU_MARK,
|
||||
FSIAILR_PU_MARK,
|
||||
@ -517,45 +513,6 @@ enum {
|
||||
PINMUX_MARK_END,
|
||||
};
|
||||
|
||||
#define PORT_DATA_I(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
|
||||
|
||||
#define PORT_DATA_I_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD)
|
||||
|
||||
#define PORT_DATA_I_PU(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_I_PU_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD, \
|
||||
PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_O(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT)
|
||||
|
||||
#define PORT_DATA_IO(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT, PORT##nr##_IN)
|
||||
|
||||
#define PORT_DATA_IO_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT, PORT##nr##_IN, \
|
||||
PORT##nr##_IN_PD)
|
||||
|
||||
#define PORT_DATA_IO_PU(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT, PORT##nr##_IN, \
|
||||
PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_IO_PU_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_OUT, PORT##nr##_IN, \
|
||||
PORT##nr##_IN_PD, PORT##nr##_IN_PU)
|
||||
|
||||
static pinmux_enum_t pinmux_data[] = {
|
||||
/* specify valid pin states for each pin in GPIO mode */
|
||||
|
||||
@ -1561,6 +1518,24 @@ static pinmux_enum_t pinmux_data[] = {
|
||||
MSEL4CR_MSEL15_0),
|
||||
PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
|
||||
MSEL4CR_MSEL15_1),
|
||||
|
||||
PINMUX_DATA(MMCD0_0_PU_MARK,
|
||||
PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
|
||||
PINMUX_DATA(MMCD0_1_PU_MARK,
|
||||
PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
|
||||
PINMUX_DATA(MMCD0_2_PU_MARK,
|
||||
PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
|
||||
PINMUX_DATA(MMCD0_3_PU_MARK,
|
||||
PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
|
||||
PINMUX_DATA(MMCD0_4_PU_MARK,
|
||||
PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
|
||||
PINMUX_DATA(MMCD0_5_PU_MARK,
|
||||
PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
|
||||
PINMUX_DATA(MMCD0_6_PU_MARK,
|
||||
PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
|
||||
PINMUX_DATA(MMCD0_7_PU_MARK,
|
||||
PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
|
||||
|
||||
PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
|
||||
PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
|
||||
PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
|
||||
@ -1568,12 +1543,8 @@ static pinmux_enum_t pinmux_data[] = {
|
||||
PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU),
|
||||
};
|
||||
|
||||
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
|
||||
#define GPIO_PORT_310() _310(_GPIO_PORT, , unused)
|
||||
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
|
||||
|
||||
static struct pinmux_gpio pinmux_gpios[] = {
|
||||
GPIO_PORT_310(),
|
||||
GPIO_PORT_ALL(),
|
||||
|
||||
/* Table 25-1 (Functions 0-7) */
|
||||
GPIO_FN(VBUS_0),
|
||||
@ -2236,24 +2207,20 @@ static struct pinmux_gpio pinmux_gpios[] = {
|
||||
GPIO_FN(SDHICMD2_PU),
|
||||
GPIO_FN(MMCCMD0_PU),
|
||||
GPIO_FN(MMCCMD1_PU),
|
||||
GPIO_FN(MMCD0_0_PU),
|
||||
GPIO_FN(MMCD0_1_PU),
|
||||
GPIO_FN(MMCD0_2_PU),
|
||||
GPIO_FN(MMCD0_3_PU),
|
||||
GPIO_FN(MMCD0_4_PU),
|
||||
GPIO_FN(MMCD0_5_PU),
|
||||
GPIO_FN(MMCD0_6_PU),
|
||||
GPIO_FN(MMCD0_7_PU),
|
||||
GPIO_FN(FSIACK_PU),
|
||||
GPIO_FN(FSIAILR_PU),
|
||||
GPIO_FN(FSIAIBT_PU),
|
||||
GPIO_FN(FSIAISLD_PU),
|
||||
};
|
||||
|
||||
#define PORTCR(nr, reg) \
|
||||
{ PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
|
||||
0, \
|
||||
/*0001*/ PORT##nr##_OUT , \
|
||||
/*0010*/ PORT##nr##_IN , 0, 0, 0, 0, 0, 0, 0, \
|
||||
/*1010*/ PORT##nr##_IN_PD, 0, 0, 0, \
|
||||
/*1110*/ PORT##nr##_IN_PU, 0, \
|
||||
PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
|
||||
PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
|
||||
PORT##nr##_FN6, PORT##nr##_FN7, 0, 0, 0, 0, 0, 0, 0, 0 } \
|
||||
}
|
||||
|
||||
static struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
PORTCR(0, 0xe6050000), /* PORT0CR */
|
||||
PORTCR(1, 0xe6050001), /* PORT1CR */
|
||||
|
||||
@ -20,6 +20,7 @@
|
||||
#include <linux/delay.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/bitrev.h>
|
||||
#include <linux/console.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/tlbflush.h>
|
||||
@ -106,9 +107,8 @@ static int pd_power_down(struct generic_pm_domain *genpd)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pd_power_up(struct generic_pm_domain *genpd)
|
||||
static int __pd_power_up(struct sh7372_pm_domain *sh7372_pd, bool do_resume)
|
||||
{
|
||||
struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
|
||||
unsigned int mask = 1 << sh7372_pd->bit_shift;
|
||||
unsigned int retry_count;
|
||||
int ret = 0;
|
||||
@ -123,13 +123,13 @@ static int pd_power_up(struct generic_pm_domain *genpd)
|
||||
|
||||
for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) {
|
||||
if (!(__raw_readl(SWUCR) & mask))
|
||||
goto out;
|
||||
break;
|
||||
if (retry_count > PSTR_RETRIES)
|
||||
udelay(PSTR_DELAY_US);
|
||||
else
|
||||
cpu_relax();
|
||||
}
|
||||
if (__raw_readl(SWUCR) & mask)
|
||||
if (!retry_count)
|
||||
ret = -EIO;
|
||||
|
||||
if (!sh7372_pd->no_debug)
|
||||
@ -137,12 +137,17 @@ static int pd_power_up(struct generic_pm_domain *genpd)
|
||||
mask, __raw_readl(PSTR));
|
||||
|
||||
out:
|
||||
if (ret == 0 && sh7372_pd->resume)
|
||||
if (ret == 0 && sh7372_pd->resume && do_resume)
|
||||
sh7372_pd->resume();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int pd_power_up(struct generic_pm_domain *genpd)
|
||||
{
|
||||
return __pd_power_up(to_sh7372_pd(genpd), true);
|
||||
}
|
||||
|
||||
static void sh7372_a4r_suspend(void)
|
||||
{
|
||||
sh7372_intcs_suspend();
|
||||
@ -174,7 +179,7 @@ void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd)
|
||||
genpd->active_wakeup = pd_active_wakeup;
|
||||
genpd->power_off = pd_power_down;
|
||||
genpd->power_on = pd_power_up;
|
||||
genpd->power_on(&sh7372_pd->genpd);
|
||||
__pd_power_up(sh7372_pd, false);
|
||||
}
|
||||
|
||||
void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
|
||||
@ -227,11 +232,23 @@ struct sh7372_pm_domain sh7372_a3sp = {
|
||||
.no_debug = true,
|
||||
};
|
||||
|
||||
static void sh7372_a3sp_init(void)
|
||||
{
|
||||
/* serial consoles make use of SCIF hardware located in A3SP,
|
||||
* keep such power domain on if "no_console_suspend" is set.
|
||||
*/
|
||||
sh7372_a3sp.stay_on = !console_suspend_enabled;
|
||||
}
|
||||
|
||||
struct sh7372_pm_domain sh7372_a3sg = {
|
||||
.bit_shift = 13,
|
||||
};
|
||||
|
||||
#endif /* CONFIG_PM */
|
||||
#else /* !CONFIG_PM */
|
||||
|
||||
static inline void sh7372_a3sp_init(void) {}
|
||||
|
||||
#endif /* !CONFIG_PM */
|
||||
|
||||
#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
|
||||
static int sh7372_do_idle_core_standby(unsigned long unused)
|
||||
@ -402,22 +419,18 @@ static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2)
|
||||
|
||||
#ifdef CONFIG_CPU_IDLE
|
||||
|
||||
static void sh7372_cpuidle_setup(struct cpuidle_device *dev)
|
||||
static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
|
||||
{
|
||||
struct cpuidle_state *state;
|
||||
int i = dev->state_count;
|
||||
struct cpuidle_state *state = &drv->states[drv->state_count];
|
||||
|
||||
state = &dev->states[i];
|
||||
snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
|
||||
strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
|
||||
state->exit_latency = 10;
|
||||
state->target_residency = 20 + 10;
|
||||
state->power_usage = 1; /* perhaps not */
|
||||
state->flags = 0;
|
||||
state->flags |= CPUIDLE_FLAG_TIME_VALID;
|
||||
shmobile_cpuidle_modes[i] = sh7372_enter_core_standby;
|
||||
state->flags = CPUIDLE_FLAG_TIME_VALID;
|
||||
shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
|
||||
|
||||
dev->state_count = i + 1;
|
||||
drv->state_count++;
|
||||
}
|
||||
|
||||
static void sh7372_cpuidle_init(void)
|
||||
@ -469,6 +482,8 @@ void __init sh7372_pm_init(void)
|
||||
/* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
|
||||
__raw_writel(0, PDNSEL);
|
||||
|
||||
sh7372_a3sp_init();
|
||||
|
||||
sh7372_suspend_init();
|
||||
sh7372_cpuidle_init();
|
||||
}
|
||||
|
||||
@ -101,6 +101,13 @@ static void __init tegra_dt_init(void)
|
||||
|
||||
tegra_clk_init_from_table(tegra_dt_clk_init_table);
|
||||
|
||||
/*
|
||||
* Finished with the static registrations now; fill in the missing
|
||||
* devices
|
||||
*/
|
||||
of_platform_populate(NULL, tegra_dt_match_table,
|
||||
tegra20_auxdata_lookup, NULL);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
|
||||
if (of_machine_is_compatible(pinmux_configs[i].machine)) {
|
||||
pinmux_configs[i].init();
|
||||
@ -110,12 +117,6 @@ static void __init tegra_dt_init(void)
|
||||
|
||||
WARN(i == ARRAY_SIZE(pinmux_configs),
|
||||
"Unknown platform! Pinmuxing not initialized\n");
|
||||
|
||||
/*
|
||||
* Finished with the static registrations now; fill in the missing
|
||||
* devices
|
||||
*/
|
||||
of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL);
|
||||
}
|
||||
|
||||
static const char * tegra_dt_board_compat[] = {
|
||||
|
||||
@ -16,6 +16,8 @@
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <mach/pinmux.h>
|
||||
|
||||
#include "gpio-names.h"
|
||||
@ -161,7 +163,9 @@ static struct tegra_gpio_table gpio_table[] = {
|
||||
|
||||
void harmony_pinmux_init(void)
|
||||
{
|
||||
platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
|
||||
if (!of_machine_is_compatible("nvidia,tegra20"))
|
||||
platform_add_devices(pinmux_devices,
|
||||
ARRAY_SIZE(pinmux_devices));
|
||||
|
||||
tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
|
||||
|
||||
|
||||
@ -16,6 +16,8 @@
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <mach/pinmux.h>
|
||||
|
||||
#include "gpio-names.h"
|
||||
@ -158,7 +160,9 @@ static struct tegra_gpio_table gpio_table[] = {
|
||||
|
||||
void paz00_pinmux_init(void)
|
||||
{
|
||||
platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
|
||||
if (!of_machine_is_compatible("nvidia,tegra20"))
|
||||
platform_add_devices(pinmux_devices,
|
||||
ARRAY_SIZE(pinmux_devices));
|
||||
|
||||
tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
|
||||
|
||||
|
||||
@ -16,6 +16,7 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <mach/pinmux.h>
|
||||
#include <mach/pinmux-t2.h>
|
||||
@ -191,6 +192,7 @@ static struct tegra_gpio_table common_gpio_table[] = {
|
||||
{ .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
|
||||
{ .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
|
||||
{ .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
|
||||
{ .gpio = TEGRA_GPIO_HP_DET, .enable = true },
|
||||
{ .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
|
||||
{ .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
|
||||
{ .gpio = TEGRA_GPIO_USB1, .enable = true },
|
||||
@ -218,7 +220,9 @@ static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size)
|
||||
|
||||
void __init seaboard_common_pinmux_init(void)
|
||||
{
|
||||
platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
|
||||
if (!of_machine_is_compatible("nvidia,tegra20"))
|
||||
platform_add_devices(pinmux_devices,
|
||||
ARRAY_SIZE(pinmux_devices));
|
||||
|
||||
tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
|
||||
|
||||
|
||||
@ -16,6 +16,7 @@
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <mach/pinmux.h>
|
||||
|
||||
@ -157,7 +158,9 @@ static struct tegra_gpio_table gpio_table[] = {
|
||||
|
||||
void __init trimslice_pinmux_init(void)
|
||||
{
|
||||
platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
|
||||
if (!of_machine_is_compatible("nvidia,tegra20"))
|
||||
platform_add_devices(pinmux_devices,
|
||||
ARRAY_SIZE(pinmux_devices));
|
||||
tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
|
||||
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
|
||||
}
|
||||
|
||||
@ -422,7 +422,7 @@ struct platform_device nuc900_device_kpi = {
|
||||
|
||||
/* LCD controller*/
|
||||
|
||||
static struct nuc900fb_display __initdata nuc900_lcd_info[] = {
|
||||
static struct nuc900fb_display nuc900_lcd_info[] = {
|
||||
/* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */
|
||||
[0] = {
|
||||
.type = LCM_DCCS_VA_SRC_RGB565,
|
||||
@ -445,7 +445,7 @@ static struct nuc900fb_display __initdata nuc900_lcd_info[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static struct nuc900fb_mach_info nuc900_fb_info __initdata = {
|
||||
static struct nuc900fb_mach_info nuc900_fb_info = {
|
||||
#if defined(CONFIG_GPM1040A0_320X240)
|
||||
.displays = &nuc900_lcd_info[0],
|
||||
#else
|
||||
|
||||
@ -19,6 +19,7 @@
|
||||
extern void mfp_set_groupf(struct device *dev);
|
||||
extern void mfp_set_groupc(struct device *dev);
|
||||
extern void mfp_set_groupi(struct device *dev);
|
||||
extern void mfp_set_groupg(struct device *dev);
|
||||
extern void mfp_set_groupg(struct device *dev, const char *subname);
|
||||
extern void mfp_set_groupd(struct device *dev, const char *subname);
|
||||
|
||||
#endif /* __ASM_ARCH_MFP_H */
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
#ifndef __ASM_ARCH_SPI_H
|
||||
#define __ASM_ARCH_SPI_H
|
||||
|
||||
extern void mfp_set_groupg(struct device *dev);
|
||||
extern void mfp_set_groupg(struct device *dev, const char *subname);
|
||||
|
||||
struct nuc900_spi_info {
|
||||
unsigned int num_cs;
|
||||
|
||||
@ -26,10 +26,8 @@
|
||||
#define REG_MFSEL (W90X900_VA_GCR + 0xC)
|
||||
|
||||
#define GPSELF (0x01 << 1)
|
||||
|
||||
#define GPSELC (0x03 << 2)
|
||||
#define ENKPI (0x02 << 2)
|
||||
#define ENNAND (0x01 << 2)
|
||||
#define GPSELD (0x0f << 4)
|
||||
|
||||
#define GPSELEI0 (0x01 << 26)
|
||||
#define GPSELEI1 (0x01 << 27)
|
||||
@ -37,11 +35,16 @@
|
||||
#define GPIOG0TO1 (0x03 << 14)
|
||||
#define GPIOG2TO3 (0x03 << 16)
|
||||
#define GPIOG22TO23 (0x03 << 22)
|
||||
#define GPIOG18TO20 (0x07 << 18)
|
||||
|
||||
#define ENSPI (0x0a << 14)
|
||||
#define ENI2C0 (0x01 << 14)
|
||||
#define ENI2C1 (0x01 << 16)
|
||||
#define ENAC97 (0x02 << 22)
|
||||
#define ENSD1 (0x02 << 18)
|
||||
#define ENSD0 (0x0a << 4)
|
||||
#define ENKPI (0x02 << 2)
|
||||
#define ENNAND (0x01 << 2)
|
||||
|
||||
static DEFINE_MUTEX(mfp_mutex);
|
||||
|
||||
@ -127,16 +130,19 @@ void mfp_set_groupi(struct device *dev)
|
||||
}
|
||||
EXPORT_SYMBOL(mfp_set_groupi);
|
||||
|
||||
void mfp_set_groupg(struct device *dev)
|
||||
void mfp_set_groupg(struct device *dev, const char *subname)
|
||||
{
|
||||
unsigned long mfpen;
|
||||
const char *dev_id;
|
||||
|
||||
BUG_ON(!dev);
|
||||
BUG_ON((!dev) && (!subname));
|
||||
|
||||
mutex_lock(&mfp_mutex);
|
||||
|
||||
dev_id = dev_name(dev);
|
||||
if (subname != NULL)
|
||||
dev_id = subname;
|
||||
else
|
||||
dev_id = dev_name(dev);
|
||||
|
||||
mfpen = __raw_readl(REG_MFSEL);
|
||||
|
||||
@ -152,6 +158,9 @@ void mfp_set_groupg(struct device *dev)
|
||||
} else if (strcmp(dev_id, "nuc900-audio") == 0) {
|
||||
mfpen &= ~(GPIOG22TO23);
|
||||
mfpen |= ENAC97;/*enable AC97*/
|
||||
} else if (strcmp(dev_id, "nuc900-mmc-port1") == 0) {
|
||||
mfpen &= ~(GPIOG18TO20);
|
||||
mfpen |= (ENSD1 | 0x01);/*enable sd1*/
|
||||
} else {
|
||||
mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/
|
||||
}
|
||||
@ -162,3 +171,30 @@ void mfp_set_groupg(struct device *dev)
|
||||
}
|
||||
EXPORT_SYMBOL(mfp_set_groupg);
|
||||
|
||||
void mfp_set_groupd(struct device *dev, const char *subname)
|
||||
{
|
||||
unsigned long mfpen;
|
||||
const char *dev_id;
|
||||
|
||||
BUG_ON((!dev) && (!subname));
|
||||
|
||||
mutex_lock(&mfp_mutex);
|
||||
|
||||
if (subname != NULL)
|
||||
dev_id = subname;
|
||||
else
|
||||
dev_id = dev_name(dev);
|
||||
|
||||
mfpen = __raw_readl(REG_MFSEL);
|
||||
|
||||
if (strcmp(dev_id, "nuc900-mmc-port0") == 0) {
|
||||
mfpen &= ~GPSELD;/*enable sd0*/
|
||||
mfpen |= ENSD0;
|
||||
} else
|
||||
mfpen &= (~GPSELD);
|
||||
|
||||
__raw_writel(mfpen, REG_MFSEL);
|
||||
|
||||
mutex_unlock(&mfp_mutex);
|
||||
}
|
||||
EXPORT_SYMBOL(mfp_set_groupd);
|
||||
|
||||
@ -10,7 +10,7 @@ choice
|
||||
|
||||
config ARCH_IMX_V4_V5
|
||||
bool "i.MX1, i.MX21, i.MX25, i.MX27"
|
||||
select AUTO_ZRELADDR
|
||||
select AUTO_ZRELADDR if !ZBOOT_ROM
|
||||
select ARM_PATCH_PHYS_VIRT
|
||||
help
|
||||
This enables support for systems based on the Freescale i.MX ARMv4
|
||||
@ -26,7 +26,7 @@ config ARCH_IMX_V6_V7
|
||||
|
||||
config ARCH_MX5
|
||||
bool "i.MX50, i.MX51, i.MX53"
|
||||
select AUTO_ZRELADDR
|
||||
select AUTO_ZRELADDR if !ZBOOT_ROM
|
||||
select ARM_PATCH_PHYS_VIRT
|
||||
help
|
||||
This enables support for machines using Freescale's i.MX50 and i.MX53
|
||||
|
||||
@ -22,6 +22,7 @@
|
||||
#include <linux/io.h>
|
||||
#include <mach/common.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/exception.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "irq-common.h"
|
||||
|
||||
@ -28,21 +28,14 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
|
||||
if (irqnr == 1023)
|
||||
break;
|
||||
|
||||
if (irqnr > 29 && irqnr < 1021)
|
||||
if (irqnr > 15 && irqnr < 1021)
|
||||
handle_IRQ(irqnr, regs);
|
||||
#ifdef CONFIG_SMP
|
||||
else if (irqnr < 16) {
|
||||
else {
|
||||
writel_relaxed(irqstat, gic_cpu_base_addr +
|
||||
GIC_CPU_EOI);
|
||||
handle_IPI(irqnr, regs);
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_LOCAL_TIMERS
|
||||
else if (irqnr == 29) {
|
||||
writel_relaxed(irqstat, gic_cpu_base_addr +
|
||||
GIC_CPU_EOI);
|
||||
handle_local_timer(regs);
|
||||
}
|
||||
#endif
|
||||
} while (1);
|
||||
}
|
||||
|
||||
@ -25,6 +25,3 @@
|
||||
|
||||
.macro test_for_ipi, irqnr, irqstat, base, tmp
|
||||
.endm
|
||||
|
||||
.macro test_for_ltirq, irqnr, irqstat, base, tmp
|
||||
.endm
|
||||
|
||||
@ -17,6 +17,7 @@
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/exception.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
@ -32,6 +32,8 @@ struct work_struct;
|
||||
struct bfin_serial_port {
|
||||
struct uart_port port;
|
||||
unsigned int old_status;
|
||||
int tx_irq;
|
||||
int rx_irq;
|
||||
int status_irq;
|
||||
#ifndef BFIN_UART_BF54X_STYLE
|
||||
unsigned int lsr;
|
||||
|
||||
@ -372,9 +372,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -415,9 +420,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -308,9 +308,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -351,9 +356,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -380,9 +380,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -423,9 +428,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -8,6 +8,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
@ -538,9 +539,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -581,9 +587,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -801,7 +812,6 @@ static struct platform_device bfin_sport1_uart_device = {
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
#include <linux/input.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
static struct gpio_keys_button bfin_gpio_keys_table[] = {
|
||||
{BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
|
||||
|
||||
@ -7,6 +7,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
@ -416,9 +417,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -459,9 +465,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -674,7 +685,6 @@ static struct platform_device bfin_sport1_uart_device = {
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
#include <linux/input.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
static struct gpio_keys_button bfin_gpio_keys_table[] = {
|
||||
{BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
|
||||
|
||||
@ -710,9 +710,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -753,9 +758,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -495,9 +495,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -539,9 +544,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -237,9 +237,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX + 1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -192,9 +192,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX + 1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -220,9 +220,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX + 1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -291,9 +291,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX + 1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -150,9 +150,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX + 1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -297,9 +297,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX + 1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -8,6 +8,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
@ -304,9 +305,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -365,9 +371,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -569,7 +580,6 @@ static struct platform_device bfin_sport1_uart_device = {
|
||||
|
||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||
#include <linux/bfin_mac.h>
|
||||
#include <linux/export.h>
|
||||
static const unsigned short bfin_mac_peripherals[] = P_MII0;
|
||||
|
||||
static struct bfin_phydev_platform_data bfin_phydev_data[] = {
|
||||
|
||||
@ -9,6 +9,7 @@
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
@ -305,9 +306,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -348,9 +354,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -534,7 +545,6 @@ static struct platform_device bfin_sport1_uart_device = {
|
||||
|
||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||
#include <linux/bfin_mac.h>
|
||||
#include <linux/export.h>
|
||||
static const unsigned short bfin_mac_peripherals[] = P_MII0;
|
||||
|
||||
static struct bfin_phydev_platform_data bfin_phydev_data[] = {
|
||||
|
||||
@ -12,6 +12,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
@ -49,7 +50,6 @@ static struct platform_device rtc_device = {
|
||||
|
||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||
#include <linux/bfin_mac.h>
|
||||
#include <linux/export.h>
|
||||
static const unsigned short bfin_mac_peripherals[] = P_RMII0;
|
||||
|
||||
static struct bfin_phydev_platform_data bfin_phydev_data[] = {
|
||||
@ -236,9 +236,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -280,9 +285,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -239,9 +239,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -282,9 +287,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -8,6 +8,7 @@
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
@ -308,9 +309,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -351,9 +357,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -7,6 +7,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
@ -1565,9 +1566,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -1620,9 +1626,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -1992,7 +2003,6 @@ static struct adp8870_backlight_platform_data adp8870_pdata = {
|
||||
|
||||
#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
|
||||
#include <linux/i2c/adp8860.h>
|
||||
#include <linux/export.h>
|
||||
static struct led_info adp8860_leds[] = {
|
||||
{
|
||||
.name = "adp8860-led7",
|
||||
|
||||
@ -9,6 +9,7 @@
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
@ -305,9 +306,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -348,9 +354,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -536,7 +547,6 @@ static struct platform_device bfin_sport1_uart_device = {
|
||||
|
||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||
#include <linux/bfin_mac.h>
|
||||
#include <linux/export.h>
|
||||
static const unsigned short bfin_mac_peripherals[] = P_MII0;
|
||||
|
||||
static struct bfin_phydev_platform_data bfin_phydev_data[] = {
|
||||
|
||||
@ -48,9 +48,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -103,9 +108,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -146,9 +156,14 @@ static struct resource bfin_uart2_resources[] = {
|
||||
.end = UART2_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART2_TX,
|
||||
.end = IRQ_UART2_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART2_RX,
|
||||
.end = IRQ_UART2_RX+1,
|
||||
.end = IRQ_UART2_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -134,9 +134,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_RBR+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -177,9 +182,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_RBR+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -236,9 +246,14 @@ static struct resource bfin_uart2_resources[] = {
|
||||
.end = UART2_RBR+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART2_TX,
|
||||
.end = IRQ_UART2_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART2_RX,
|
||||
.end = IRQ_UART2_RX+1,
|
||||
.end = IRQ_UART2_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -279,9 +294,14 @@ static struct resource bfin_uart3_resources[] = {
|
||||
.end = UART3_RBR+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART3_TX,
|
||||
.end = IRQ_UART3_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART3_RX,
|
||||
.end = IRQ_UART3_RX+1,
|
||||
.end = IRQ_UART3_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -240,9 +240,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = UART0_RBR+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_TX,
|
||||
.end = IRQ_UART0_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART0_RX,
|
||||
.end = IRQ_UART0_RX+1,
|
||||
.end = IRQ_UART0_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -283,9 +288,14 @@ static struct resource bfin_uart1_resources[] = {
|
||||
.end = UART1_RBR+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_TX,
|
||||
.end = IRQ_UART1_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_RX,
|
||||
.end = IRQ_UART1_RX+1,
|
||||
.end = IRQ_UART1_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -342,9 +352,14 @@ static struct resource bfin_uart2_resources[] = {
|
||||
.end = UART2_RBR+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART2_TX,
|
||||
.end = IRQ_UART2_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART2_RX,
|
||||
.end = IRQ_UART2_RX+1,
|
||||
.end = IRQ_UART2_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
@ -385,9 +400,14 @@ static struct resource bfin_uart3_resources[] = {
|
||||
.end = UART3_RBR+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART3_TX,
|
||||
.end = IRQ_UART3_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART3_RX,
|
||||
.end = IRQ_UART3_RX+1,
|
||||
.end = IRQ_UART3_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -202,9 +202,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL + 2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART_TX,
|
||||
.end = IRQ_UART_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART_RX,
|
||||
.end = IRQ_UART_RX + 1,
|
||||
.end = IRQ_UART_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -276,9 +276,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART_TX,
|
||||
.end = IRQ_UART_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART_RX,
|
||||
.end = IRQ_UART_RX+1,
|
||||
.end = IRQ_UART_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -171,9 +171,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART_TX,
|
||||
.end = IRQ_UART_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART_RX,
|
||||
.end = IRQ_UART_RX+1,
|
||||
.end = IRQ_UART_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -50,9 +50,14 @@ static struct resource bfin_uart0_resources[] = {
|
||||
.end = BFIN_UART_GCTL+2,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART_TX,
|
||||
.end = IRQ_UART_TX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART_RX,
|
||||
.end = IRQ_UART_RX+1,
|
||||
.end = IRQ_UART_RX,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
|
||||
@ -3,7 +3,7 @@ if ETRAX_ARCH_V10
|
||||
config ETRAX_ETHERNET
|
||||
bool "Ethernet support"
|
||||
depends on ETRAX_ARCH_V10
|
||||
select NET_ETHERNET
|
||||
select ETHERNET
|
||||
select NET_CORE
|
||||
select MII
|
||||
help
|
||||
|
||||
@ -3,7 +3,7 @@ if ETRAX_ARCH_V32
|
||||
config ETRAX_ETHERNET
|
||||
bool "Ethernet support"
|
||||
depends on ETRAX_ARCH_V32
|
||||
select NET_ETHERNET
|
||||
select ETHERNET
|
||||
select NET_CORE
|
||||
select MII
|
||||
help
|
||||
|
||||
@ -4,8 +4,8 @@ config M68K
|
||||
select HAVE_IDE
|
||||
select HAVE_AOUT if MMU
|
||||
select GENERIC_ATOMIC64 if MMU
|
||||
select HAVE_GENERIC_HARDIRQS if !MMU
|
||||
select GENERIC_IRQ_SHOW if !MMU
|
||||
select HAVE_GENERIC_HARDIRQS
|
||||
select GENERIC_IRQ_SHOW
|
||||
select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
|
||||
|
||||
config RWSEM_GENERIC_SPINLOCK
|
||||
|
||||
@ -2,6 +2,15 @@ if MMU
|
||||
|
||||
comment "Bus Support"
|
||||
|
||||
config DIO
|
||||
bool "DIO bus support"
|
||||
depends on HP300
|
||||
default y
|
||||
help
|
||||
Say Y here to enable support for the "DIO" expansion bus used in
|
||||
HP300 machines. If you are using such a system you almost certainly
|
||||
want this.
|
||||
|
||||
config NUBUS
|
||||
bool
|
||||
depends on MAC
|
||||
|
||||
@ -24,6 +24,37 @@ config PROC_HARDWARE
|
||||
including the model, CPU, MMU, clock speed, BogoMIPS rating,
|
||||
and memory size.
|
||||
|
||||
config NATFEAT
|
||||
bool "ARAnyM emulator support"
|
||||
depends on ATARI
|
||||
help
|
||||
This option enables support for ARAnyM native features, such as
|
||||
access to a disk image as /dev/hda.
|
||||
|
||||
config NFBLOCK
|
||||
tristate "NatFeat block device support"
|
||||
depends on BLOCK && NATFEAT
|
||||
help
|
||||
Say Y to include support for the ARAnyM NatFeat block device
|
||||
which allows direct access to the hard drives without using
|
||||
the hardware emulation.
|
||||
|
||||
config NFCON
|
||||
tristate "NatFeat console driver"
|
||||
depends on NATFEAT
|
||||
help
|
||||
Say Y to include support for the ARAnyM NatFeat console driver
|
||||
which allows the console output to be redirected to the stderr
|
||||
output of ARAnyM.
|
||||
|
||||
config NFETH
|
||||
tristate "NatFeat Ethernet support"
|
||||
depends on ETHERNET && NATFEAT
|
||||
help
|
||||
Say Y to include support for the ARAnyM NatFeat network device
|
||||
which will emulate a regular ethernet device while presenting an
|
||||
ethertap device to the host system.
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Character devices"
|
||||
|
||||
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Reference in New Issue
Block a user