igb: Refactor NVM read functions to accommodate devices with no flash
This patch refactors NVM read functions in order to accommodate i210 devices that do not have a flash. Previously, this was not supported on i210 devices. Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -628,6 +628,11 @@
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#define E1000_I210_FIFO_SEL_TX_LEGACY E1000_I210_FIFO_SEL_TX_QAV(0)
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#define E1000_I210_FIFO_SEL_BMC2OS_TX 0x06
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#define E1000_I210_FIFO_SEL_BMC2OS_RX 0x01
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#define E1000_I210_FLASH_SECTOR_SIZE 0x1000 /* 4KB FLASH sector unit size */
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/* Secure FLASH mode requires removing MSb */
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#define E1000_I210_FW_PTR_MASK 0x7FFF
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/* Firmware code revision field word offset*/
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#define E1000_I210_FW_VER_OFFSET 328
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#define E1000_EECD_FLUPD_I210 0x00800000 /* Update FLASH */
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#define E1000_EECD_FLUDONE_I210 0x04000000 /* Update FLASH done*/
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#define E1000_FLUDONE_ATTEMPTS 20000
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@ -335,57 +335,101 @@ s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,
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}
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/**
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* igb_read_nvm_i211 - Read NVM wrapper function for I211
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* igb_read_invm_word_i210 - Reads OTP
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* @hw: pointer to the HW structure
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* @address: the word address (aka eeprom offset) to read
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* @data: pointer to the data read
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*
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* Reads 16-bit words from the OTP. Return error when the word is not
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* stored in OTP.
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**/
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static s32 igb_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data)
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{
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s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
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u32 invm_dword;
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u16 i;
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u8 record_type, word_address;
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for (i = 0; i < E1000_INVM_SIZE; i++) {
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invm_dword = rd32(E1000_INVM_DATA_REG(i));
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/* Get record type */
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record_type = INVM_DWORD_TO_RECORD_TYPE(invm_dword);
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if (record_type == E1000_INVM_UNINITIALIZED_STRUCTURE)
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break;
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if (record_type == E1000_INVM_CSR_AUTOLOAD_STRUCTURE)
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i += E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS;
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if (record_type == E1000_INVM_RSA_KEY_SHA256_STRUCTURE)
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i += E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS;
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if (record_type == E1000_INVM_WORD_AUTOLOAD_STRUCTURE) {
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word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);
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if (word_address == address) {
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*data = INVM_DWORD_TO_WORD_DATA(invm_dword);
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hw_dbg("Read INVM Word 0x%02x = %x",
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address, *data);
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status = E1000_SUCCESS;
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break;
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}
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}
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}
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if (status != E1000_SUCCESS)
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hw_dbg("Requested word 0x%02x not found in OTP\n", address);
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return status;
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}
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/**
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* igb_read_invm_i210 - Read invm wrapper function for I210/I211
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* @hw: pointer to the HW structure
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* @words: number of words to read
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* @data: pointer to the data read
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*
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* Wrapper function to return data formerly found in the NVM.
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**/
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s32 igb_read_nvm_i211(struct e1000_hw *hw, u16 offset, u16 words,
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u16 *data)
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static s32 igb_read_invm_i210(struct e1000_hw *hw, u16 offset,
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u16 words __always_unused, u16 *data)
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{
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s32 ret_val = E1000_SUCCESS;
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/* Only the MAC addr is required to be present in the iNVM */
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switch (offset) {
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case NVM_MAC_ADDR:
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ret_val = igb_read_invm_i211(hw, offset, &data[0]);
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ret_val |= igb_read_invm_i211(hw, offset+1, &data[1]);
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ret_val |= igb_read_invm_i211(hw, offset+2, &data[2]);
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ret_val = igb_read_invm_word_i210(hw, (u8)offset, &data[0]);
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ret_val |= igb_read_invm_word_i210(hw, (u8)offset+1,
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&data[1]);
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ret_val |= igb_read_invm_word_i210(hw, (u8)offset+2,
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&data[2]);
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if (ret_val != E1000_SUCCESS)
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hw_dbg("MAC Addr not found in iNVM\n");
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break;
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case NVM_INIT_CTRL_2:
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ret_val = igb_read_invm_i211(hw, (u8)offset, data);
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ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);
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if (ret_val != E1000_SUCCESS) {
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*data = NVM_INIT_CTRL_2_DEFAULT_I211;
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ret_val = E1000_SUCCESS;
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}
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break;
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case NVM_INIT_CTRL_4:
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ret_val = igb_read_invm_i211(hw, (u8)offset, data);
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ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);
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if (ret_val != E1000_SUCCESS) {
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*data = NVM_INIT_CTRL_4_DEFAULT_I211;
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ret_val = E1000_SUCCESS;
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}
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break;
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case NVM_LED_1_CFG:
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ret_val = igb_read_invm_i211(hw, (u8)offset, data);
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ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);
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if (ret_val != E1000_SUCCESS) {
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*data = NVM_LED_1_CFG_DEFAULT_I211;
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ret_val = E1000_SUCCESS;
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}
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break;
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case NVM_LED_0_2_CFG:
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igb_read_invm_i211(hw, offset, data);
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ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);
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if (ret_val != E1000_SUCCESS) {
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*data = NVM_LED_0_2_CFG_DEFAULT_I211;
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ret_val = E1000_SUCCESS;
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}
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break;
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case NVM_ID_LED_SETTINGS:
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ret_val = igb_read_invm_i211(hw, (u8)offset, data);
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ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);
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if (ret_val != E1000_SUCCESS) {
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*data = ID_LED_RESERVED_FFFF;
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ret_val = E1000_SUCCESS;
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@ -410,48 +454,6 @@ s32 igb_read_nvm_i211(struct e1000_hw *hw, u16 offset, u16 words,
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return ret_val;
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}
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/**
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* igb_read_invm_i211 - Reads OTP
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* @hw: pointer to the HW structure
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* @address: the word address (aka eeprom offset) to read
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* @data: pointer to the data read
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*
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* Reads 16-bit words from the OTP. Return error when the word is not
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* stored in OTP.
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**/
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s32 igb_read_invm_i211(struct e1000_hw *hw, u16 address, u16 *data)
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{
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s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
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u32 invm_dword;
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u16 i;
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u8 record_type, word_address;
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for (i = 0; i < E1000_INVM_SIZE; i++) {
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invm_dword = rd32(E1000_INVM_DATA_REG(i));
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/* Get record type */
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record_type = INVM_DWORD_TO_RECORD_TYPE(invm_dword);
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if (record_type == E1000_INVM_UNINITIALIZED_STRUCTURE)
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break;
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if (record_type == E1000_INVM_CSR_AUTOLOAD_STRUCTURE)
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i += E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS;
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if (record_type == E1000_INVM_RSA_KEY_SHA256_STRUCTURE)
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i += E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS;
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if (record_type == E1000_INVM_WORD_AUTOLOAD_STRUCTURE) {
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word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);
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if (word_address == (u8)address) {
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*data = INVM_DWORD_TO_WORD_DATA(invm_dword);
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hw_dbg("Read INVM Word 0x%02x = %x",
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address, *data);
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status = E1000_SUCCESS;
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break;
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}
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}
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}
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if (status != E1000_SUCCESS)
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hw_dbg("Requested word 0x%02x not found in OTP\n", address);
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return status;
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}
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/**
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* igb_read_invm_version - Reads iNVM version and image type
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* @hw: pointer to the HW structure
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@ -826,7 +828,7 @@ s32 igb_init_nvm_params_i210(struct e1000_hw *hw)
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nvm->ops.update = igb_update_nvm_checksum_i210;
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} else {
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hw->nvm.type = e1000_nvm_invm;
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nvm->ops.read = igb_read_nvm_i211;
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nvm->ops.read = igb_read_invm_i210;
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nvm->ops.write = NULL;
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nvm->ops.validate = NULL;
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nvm->ops.update = NULL;
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@ -35,14 +35,11 @@ extern s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,
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u16 words, u16 *data);
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extern s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,
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u16 words, u16 *data);
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extern s32 igb_read_invm_i211(struct e1000_hw *hw, u16 address, u16 *data);
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extern s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
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extern void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
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extern s32 igb_acquire_nvm_i210(struct e1000_hw *hw);
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extern void igb_release_nvm_i210(struct e1000_hw *hw);
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extern s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data);
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extern s32 igb_read_nvm_i211(struct e1000_hw *hw, u16 offset, u16 words,
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u16 *data);
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extern s32 igb_read_invm_version(struct e1000_hw *hw,
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struct e1000_fw_version *invm_ver);
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extern s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
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@ -2166,15 +2166,28 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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*/
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hw->mac.ops.reset_hw(hw);
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/* make sure the NVM is good , i211 parts have special NVM that
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* doesn't contain a checksum
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/* make sure the NVM is good , i211/i210 parts can have special NVM
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* that doesn't contain a checksum
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*/
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if (hw->mac.type != e1000_i211) {
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switch (hw->mac.type) {
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case e1000_i210:
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case e1000_i211:
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if (igb_get_flash_presence_i210(hw)) {
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if (hw->nvm.ops.validate(hw) < 0) {
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dev_err(&pdev->dev,
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"The NVM Checksum Is Not Valid\n");
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err = -EIO;
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goto err_eeprom;
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}
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}
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break;
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default:
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if (hw->nvm.ops.validate(hw) < 0) {
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dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
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err = -EIO;
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goto err_eeprom;
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}
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break;
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}
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/* copy the MAC address out of the NVM */
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