KVM: arm/arm64: vgic: move GICv2 registers to their own structure
In order to make way for the GICv3 registers, move the v2-specific registers to their own structure. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
committed by
Christoffer Dall
parent
63f8344cb4
commit
eede821dbf
@@ -601,7 +601,7 @@ static bool handle_mmio_sgi_reg(struct kvm_vcpu *vcpu,
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static void vgic_retire_lr(int lr_nr, int irq, struct vgic_cpu *vgic_cpu)
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{
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clear_bit(lr_nr, vgic_cpu->lr_used);
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vgic_cpu->vgic_lr[lr_nr] &= ~GICH_LR_STATE;
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vgic_cpu->vgic_v2.vgic_lr[lr_nr] &= ~GICH_LR_STATE;
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vgic_cpu->vgic_irq_lr_map[irq] = LR_EMPTY;
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}
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@@ -626,7 +626,7 @@ static void vgic_unqueue_irqs(struct kvm_vcpu *vcpu)
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u32 *lr;
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for_each_set_bit(i, vgic_cpu->lr_used, vgic_cpu->nr_lr) {
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lr = &vgic_cpu->vgic_lr[i];
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lr = &vgic_cpu->vgic_v2.vgic_lr[i];
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irq = LR_IRQID(*lr);
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source_cpu = LR_CPUID(*lr);
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@@ -1007,7 +1007,7 @@ static void vgic_retire_disabled_irqs(struct kvm_vcpu *vcpu)
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int lr;
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for_each_set_bit(lr, vgic_cpu->lr_used, vgic_cpu->nr_lr) {
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int irq = vgic_cpu->vgic_lr[lr] & GICH_LR_VIRTUALID;
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int irq = vgic_cpu->vgic_v2.vgic_lr[lr] & GICH_LR_VIRTUALID;
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if (!vgic_irq_is_enabled(vcpu, irq)) {
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vgic_retire_lr(lr, irq, vgic_cpu);
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@@ -1037,11 +1037,11 @@ static bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq)
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/* Do we have an active interrupt for the same CPUID? */
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if (lr != LR_EMPTY &&
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(LR_CPUID(vgic_cpu->vgic_lr[lr]) == sgi_source_id)) {
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(LR_CPUID(vgic_cpu->vgic_v2.vgic_lr[lr]) == sgi_source_id)) {
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kvm_debug("LR%d piggyback for IRQ%d %x\n",
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lr, irq, vgic_cpu->vgic_lr[lr]);
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lr, irq, vgic_cpu->vgic_v2.vgic_lr[lr]);
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BUG_ON(!test_bit(lr, vgic_cpu->lr_used));
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vgic_cpu->vgic_lr[lr] |= GICH_LR_PENDING_BIT;
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vgic_cpu->vgic_v2.vgic_lr[lr] |= GICH_LR_PENDING_BIT;
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return true;
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}
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@@ -1052,12 +1052,12 @@ static bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq)
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return false;
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kvm_debug("LR%d allocated for IRQ%d %x\n", lr, irq, sgi_source_id);
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vgic_cpu->vgic_lr[lr] = MK_LR_PEND(sgi_source_id, irq);
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vgic_cpu->vgic_v2.vgic_lr[lr] = MK_LR_PEND(sgi_source_id, irq);
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vgic_cpu->vgic_irq_lr_map[irq] = lr;
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set_bit(lr, vgic_cpu->lr_used);
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if (!vgic_irq_is_edge(vcpu, irq))
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vgic_cpu->vgic_lr[lr] |= GICH_LR_EOI;
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vgic_cpu->vgic_v2.vgic_lr[lr] |= GICH_LR_EOI;
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return true;
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}
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@@ -1155,9 +1155,9 @@ static void __kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
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epilog:
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if (overflow) {
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vgic_cpu->vgic_hcr |= GICH_HCR_UIE;
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vgic_cpu->vgic_v2.vgic_hcr |= GICH_HCR_UIE;
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} else {
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vgic_cpu->vgic_hcr &= ~GICH_HCR_UIE;
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vgic_cpu->vgic_v2.vgic_hcr &= ~GICH_HCR_UIE;
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/*
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* We're about to run this VCPU, and we've consumed
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* everything the distributor had in store for
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@@ -1173,21 +1173,21 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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bool level_pending = false;
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kvm_debug("MISR = %08x\n", vgic_cpu->vgic_misr);
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kvm_debug("MISR = %08x\n", vgic_cpu->vgic_v2.vgic_misr);
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if (vgic_cpu->vgic_misr & GICH_MISR_EOI) {
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if (vgic_cpu->vgic_v2.vgic_misr & GICH_MISR_EOI) {
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/*
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* Some level interrupts have been EOIed. Clear their
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* active bit.
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*/
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int lr, irq;
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for_each_set_bit(lr, (unsigned long *)vgic_cpu->vgic_eisr,
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for_each_set_bit(lr, (unsigned long *)vgic_cpu->vgic_v2.vgic_eisr,
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vgic_cpu->nr_lr) {
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irq = vgic_cpu->vgic_lr[lr] & GICH_LR_VIRTUALID;
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irq = vgic_cpu->vgic_v2.vgic_lr[lr] & GICH_LR_VIRTUALID;
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vgic_irq_clear_active(vcpu, irq);
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vgic_cpu->vgic_lr[lr] &= ~GICH_LR_EOI;
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vgic_cpu->vgic_v2.vgic_lr[lr] &= ~GICH_LR_EOI;
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/* Any additional pending interrupt? */
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if (vgic_dist_irq_is_pending(vcpu, irq)) {
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@@ -1201,13 +1201,13 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
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* Despite being EOIed, the LR may not have
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* been marked as empty.
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*/
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set_bit(lr, (unsigned long *)vgic_cpu->vgic_elrsr);
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vgic_cpu->vgic_lr[lr] &= ~GICH_LR_ACTIVE_BIT;
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set_bit(lr, (unsigned long *)vgic_cpu->vgic_v2.vgic_elrsr);
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vgic_cpu->vgic_v2.vgic_lr[lr] &= ~GICH_LR_ACTIVE_BIT;
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}
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}
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if (vgic_cpu->vgic_misr & GICH_MISR_U)
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vgic_cpu->vgic_hcr &= ~GICH_HCR_UIE;
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if (vgic_cpu->vgic_v2.vgic_misr & GICH_MISR_U)
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vgic_cpu->vgic_v2.vgic_hcr &= ~GICH_HCR_UIE;
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return level_pending;
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}
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@@ -1226,21 +1226,21 @@ static void __kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
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level_pending = vgic_process_maintenance(vcpu);
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/* Clear mappings for empty LRs */
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for_each_set_bit(lr, (unsigned long *)vgic_cpu->vgic_elrsr,
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for_each_set_bit(lr, (unsigned long *)vgic_cpu->vgic_v2.vgic_elrsr,
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vgic_cpu->nr_lr) {
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int irq;
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if (!test_and_clear_bit(lr, vgic_cpu->lr_used))
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continue;
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irq = vgic_cpu->vgic_lr[lr] & GICH_LR_VIRTUALID;
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irq = vgic_cpu->vgic_v2.vgic_lr[lr] & GICH_LR_VIRTUALID;
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BUG_ON(irq >= VGIC_NR_IRQS);
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vgic_cpu->vgic_irq_lr_map[irq] = LR_EMPTY;
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}
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/* Check if we still have something up our sleeve... */
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pending = find_first_zero_bit((unsigned long *)vgic_cpu->vgic_elrsr,
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pending = find_first_zero_bit((unsigned long *)vgic_cpu->vgic_v2.vgic_elrsr,
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vgic_cpu->nr_lr);
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if (level_pending || pending < vgic_cpu->nr_lr)
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set_bit(vcpu->vcpu_id, &dist->irq_pending_on_cpu);
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@@ -1436,10 +1436,10 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
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* points to their reset values. Anything else resets to zero
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* anyway.
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*/
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vgic_cpu->vgic_vmcr = 0;
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vgic_cpu->vgic_v2.vgic_vmcr = 0;
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vgic_cpu->nr_lr = vgic_nr_lr;
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vgic_cpu->vgic_hcr = GICH_HCR_EN; /* Get the show on the road... */
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vgic_cpu->vgic_v2.vgic_hcr = GICH_HCR_EN; /* Get the show on the road... */
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return 0;
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}
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@@ -1746,15 +1746,15 @@ static bool handle_cpu_mmio_misc(struct kvm_vcpu *vcpu,
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}
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if (!mmio->is_write) {
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reg = (vgic_cpu->vgic_vmcr & mask) >> shift;
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reg = (vgic_cpu->vgic_v2.vgic_vmcr & mask) >> shift;
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mmio_data_write(mmio, ~0, reg);
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} else {
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reg = mmio_data_read(mmio, ~0);
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reg = (reg << shift) & mask;
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if (reg != (vgic_cpu->vgic_vmcr & mask))
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if (reg != (vgic_cpu->vgic_v2.vgic_vmcr & mask))
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updated = true;
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vgic_cpu->vgic_vmcr &= ~mask;
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vgic_cpu->vgic_vmcr |= reg;
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vgic_cpu->vgic_v2.vgic_vmcr &= ~mask;
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vgic_cpu->vgic_v2.vgic_vmcr |= reg;
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}
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return updated;
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}
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