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ASoC: Intel: Fix naming of HMDC register macros.

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HMDC is the correct naming for this register.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Signed-off-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
Liam Girdwood 2014-07-30 20:05:44 +08:00 committed by Mark Brown
parent afdb74fd70
commit ee4a6ce6cd
2 changed files with 7 additions and 7 deletions
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8
sound/soc/intel/sst-dsp.h
View File

@ -52,7 +52,7 @@
#define SST_CLKCTL 0x78
#define SST_CSR2 0x80
#define SST_LTRC 0xE0
#define SST_HDMC 0xE8
#define SST_HMDC 0xE8
#define SST_SHIM_BEGIN SST_CSR
#define SST_SHIM_END SST_HDMC
@ -122,9 +122,9 @@
/* LTRC */
#define SST_LTRC_VAL(x) (x << 0)
/* HDMC */
#define SST_HDMC_HDDA0(x) (x << 0)
#define SST_HDMC_HDDA1(x) (x << 7)
/* HMDC */
#define SST_HMDC_HDDA0(x) (x << 0)
#define SST_HMDC_HDDA1(x) (x << 7)
/* SST Vendor Defined Registers and bits */

6
sound/soc/intel/sst-haswell-dsp.c
View File

@ -269,9 +269,9 @@ static void hsw_boot(struct sst_dsp *sst)
SST_CSR2_SDFD_SSP1);
/* enable DMA engine 0,1 all channels to access host memory */
sst_dsp_shim_update_bits_unlocked(sst, SST_HDMC,
SST_HDMC_HDDA1(0xff) | SST_HDMC_HDDA0(0xff),
SST_HDMC_HDDA1(0xff) | SST_HDMC_HDDA0(0xff));
sst_dsp_shim_update_bits_unlocked(sst, SST_HMDC,
SST_HMDC_HDDA1(0xff) | SST_HMDC_HDDA0(0xff),
SST_HMDC_HDDA1(0xff) | SST_HMDC_HDDA0(0xff));
/* disable all clock gating */
writel(0x0, sst->addr.pci_cfg + SST_VDRTCTL2);