forked from Minki/linux
crypto: caam - support crypto_engine framework for SKCIPHER algorithms
Integrate crypto_engine into CAAM, to make use of the engine queue. Add support for SKCIPHER algorithms. This is intended to be used for CAAM backlogging support. The requests, with backlog flag (e.g. from dm-crypt) will be listed into crypto-engine queue and processed by CAAM when free. This changes the return codes for enqueuing a request: -EINPROGRESS if OK, -EBUSY if request is backlogged (via crypto-engine), -ENOSPC if the queue is full, -EIO if it cannot map the caller's descriptor. The requests, with backlog flag, will be listed into crypto-engine queue and processed by CAAM when free. Only the backlog request are sent to crypto-engine since the others can be handled by CAAM, if free, especially since JR has up to 1024 entries (more than the 10 entries from crypto-engine). Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Iuliana Prodan
Herbert Xu
parent
4d370a1036
commit
ee38767f15
@ -33,6 +33,7 @@ config CRYPTO_DEV_FSL_CAAM_DEBUG
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menuconfig CRYPTO_DEV_FSL_CAAM_JR
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tristate "Freescale CAAM Job Ring driver backend"
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select CRYPTO_ENGINE
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default y
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help
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Enables the driver module for Job Rings which are part of
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@ -56,6 +56,7 @@
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#include "sg_sw_sec4.h"
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#include "key_gen.h"
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#include "caamalg_desc.h"
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#include <crypto/engine.h>
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/*
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* crypto alg
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@ -101,6 +102,7 @@ struct caam_skcipher_alg {
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* per-session context
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*/
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struct caam_ctx {
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struct crypto_engine_ctx enginectx;
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u32 sh_desc_enc[DESC_MAX_USED_LEN];
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u32 sh_desc_dec[DESC_MAX_USED_LEN];
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u8 key[CAAM_MAX_KEY_SIZE];
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@ -114,6 +116,10 @@ struct caam_ctx {
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unsigned int authsize;
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};
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struct caam_skcipher_req_ctx {
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struct skcipher_edesc *edesc;
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};
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static int aead_null_set_sh_desc(struct crypto_aead *aead)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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@ -881,6 +887,7 @@ struct aead_edesc {
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* @mapped_dst_nents: number of segments in output h/w link table
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* @iv_dma: dma address of iv for checking continuity and link table
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* @sec4_sg_bytes: length of dma mapped sec4_sg space
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* @bklog: stored to determine if the request needs backlog
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* @sec4_sg_dma: bus physical mapped address of h/w link table
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* @sec4_sg: pointer to h/w link table
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* @hw_desc: the h/w job descriptor followed by any referenced link tables
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@ -893,6 +900,7 @@ struct skcipher_edesc {
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int mapped_dst_nents;
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dma_addr_t iv_dma;
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int sec4_sg_bytes;
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bool bklog;
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dma_addr_t sec4_sg_dma;
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struct sec4_sg_entry *sec4_sg;
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u32 hw_desc[0];
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@ -967,13 +975,15 @@ static void skcipher_crypt_done(struct device *jrdev, u32 *desc, u32 err,
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{
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struct skcipher_request *req = context;
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struct skcipher_edesc *edesc;
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struct caam_skcipher_req_ctx *rctx = skcipher_request_ctx(req);
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struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
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struct caam_drv_private_jr *jrp = dev_get_drvdata(jrdev);
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int ivsize = crypto_skcipher_ivsize(skcipher);
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int ecode = 0;
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dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
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edesc = container_of(desc, struct skcipher_edesc, hw_desc[0]);
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edesc = rctx->edesc;
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if (err)
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ecode = caam_jr_strstatus(jrdev, err);
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@ -999,7 +1009,14 @@ static void skcipher_crypt_done(struct device *jrdev, u32 *desc, u32 err,
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kfree(edesc);
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skcipher_request_complete(req, ecode);
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/*
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* If no backlog flag, the completion of the request is done
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* by CAAM, not crypto engine.
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*/
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if (!edesc->bklog)
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skcipher_request_complete(req, ecode);
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else
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crypto_finalize_skcipher_request(jrp->engine, req, ecode);
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}
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/*
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@ -1520,6 +1537,7 @@ static struct skcipher_edesc *skcipher_edesc_alloc(struct skcipher_request *req,
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{
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struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
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struct caam_ctx *ctx = crypto_skcipher_ctx(skcipher);
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struct caam_skcipher_req_ctx *rctx = skcipher_request_ctx(req);
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struct device *jrdev = ctx->jrdev;
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gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ?
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GFP_KERNEL : GFP_ATOMIC;
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@ -1618,6 +1636,7 @@ static struct skcipher_edesc *skcipher_edesc_alloc(struct skcipher_request *req,
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edesc->sec4_sg_bytes = sec4_sg_bytes;
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edesc->sec4_sg = (struct sec4_sg_entry *)((u8 *)edesc->hw_desc +
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desc_bytes);
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rctx->edesc = edesc;
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/* Make sure IV is located in a DMAable area */
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if (ivsize) {
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@ -1673,12 +1692,35 @@ static struct skcipher_edesc *skcipher_edesc_alloc(struct skcipher_request *req,
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return edesc;
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}
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static int skcipher_do_one_req(struct crypto_engine *engine, void *areq)
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{
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struct skcipher_request *req = skcipher_request_cast(areq);
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struct caam_ctx *ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));
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struct caam_skcipher_req_ctx *rctx = skcipher_request_ctx(req);
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u32 *desc = rctx->edesc->hw_desc;
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int ret;
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rctx->edesc->bklog = true;
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ret = caam_jr_enqueue(ctx->jrdev, desc, skcipher_crypt_done, req);
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if (ret != -EINPROGRESS) {
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skcipher_unmap(ctx->jrdev, rctx->edesc, req);
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kfree(rctx->edesc);
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} else {
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ret = 0;
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}
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return ret;
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}
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static inline int skcipher_crypt(struct skcipher_request *req, bool encrypt)
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{
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struct skcipher_edesc *edesc;
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struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
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struct caam_ctx *ctx = crypto_skcipher_ctx(skcipher);
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struct device *jrdev = ctx->jrdev;
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struct caam_drv_private_jr *jrpriv = dev_get_drvdata(jrdev);
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u32 *desc;
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int ret = 0;
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@ -1698,9 +1740,18 @@ static inline int skcipher_crypt(struct skcipher_request *req, bool encrypt)
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desc_bytes(edesc->hw_desc), 1);
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desc = edesc->hw_desc;
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ret = caam_jr_enqueue(jrdev, desc, skcipher_crypt_done, req);
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/*
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* Only the backlog request are sent to crypto-engine since the others
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* can be handled by CAAM, if free, especially since JR has up to 1024
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* entries (more than the 10 entries from crypto-engine).
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*/
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if (req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG)
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ret = crypto_transfer_skcipher_request_to_engine(jrpriv->engine,
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req);
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else
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ret = caam_jr_enqueue(jrdev, desc, skcipher_crypt_done, req);
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if (ret != -EINPROGRESS) {
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if ((ret != -EINPROGRESS) && (ret != -EBUSY)) {
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skcipher_unmap(jrdev, edesc, req);
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kfree(edesc);
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}
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@ -3221,6 +3272,8 @@ static int caam_init_common(struct caam_ctx *ctx, struct caam_alg_entry *caam,
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{
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dma_addr_t dma_addr;
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struct caam_drv_private *priv;
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const size_t sh_desc_enc_offset = offsetof(struct caam_ctx,
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sh_desc_enc);
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ctx->jrdev = caam_jr_alloc();
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if (IS_ERR(ctx->jrdev)) {
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@ -3236,7 +3289,8 @@ static int caam_init_common(struct caam_ctx *ctx, struct caam_alg_entry *caam,
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dma_addr = dma_map_single_attrs(ctx->jrdev, ctx->sh_desc_enc,
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offsetof(struct caam_ctx,
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sh_desc_enc_dma),
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sh_desc_enc_dma) -
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sh_desc_enc_offset,
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ctx->dir, DMA_ATTR_SKIP_CPU_SYNC);
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if (dma_mapping_error(ctx->jrdev, dma_addr)) {
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dev_err(ctx->jrdev, "unable to map key, shared descriptors\n");
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@ -3246,8 +3300,10 @@ static int caam_init_common(struct caam_ctx *ctx, struct caam_alg_entry *caam,
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ctx->sh_desc_enc_dma = dma_addr;
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ctx->sh_desc_dec_dma = dma_addr + offsetof(struct caam_ctx,
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sh_desc_dec);
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ctx->key_dma = dma_addr + offsetof(struct caam_ctx, key);
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sh_desc_dec) -
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sh_desc_enc_offset;
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ctx->key_dma = dma_addr + offsetof(struct caam_ctx, key) -
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sh_desc_enc_offset;
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/* copy descriptor header template value */
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ctx->cdata.algtype = OP_TYPE_CLASS1_ALG | caam->class1_alg_type;
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@ -3261,6 +3317,11 @@ static int caam_cra_init(struct crypto_skcipher *tfm)
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struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
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struct caam_skcipher_alg *caam_alg =
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container_of(alg, typeof(*caam_alg), skcipher);
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struct caam_ctx *ctx = crypto_skcipher_ctx(tfm);
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crypto_skcipher_set_reqsize(tfm, sizeof(struct caam_skcipher_req_ctx));
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ctx->enginectx.op.do_one_request = skcipher_do_one_req;
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return caam_init_common(crypto_skcipher_ctx(tfm), &caam_alg->caam,
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false);
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@ -3279,7 +3340,8 @@ static int caam_aead_init(struct crypto_aead *tfm)
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static void caam_exit_common(struct caam_ctx *ctx)
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{
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dma_unmap_single_attrs(ctx->jrdev, ctx->sh_desc_enc_dma,
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offsetof(struct caam_ctx, sh_desc_enc_dma),
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offsetof(struct caam_ctx, sh_desc_enc_dma) -
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offsetof(struct caam_ctx, sh_desc_enc),
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ctx->dir, DMA_ATTR_SKIP_CPU_SYNC);
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caam_jr_free(ctx->jrdev);
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}
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@ -11,6 +11,7 @@
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#define INTERN_H
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#include "ctrl.h"
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#include <crypto/engine.h>
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/* Currently comes from Kconfig param as a ^2 (driver-required) */
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#define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE)
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@ -60,6 +61,7 @@ struct caam_drv_private_jr {
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int out_ring_read_index; /* Output index "tail" */
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int tail; /* entinfo (s/w ring) tail index */
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void *outring; /* Base of output ring, DMA-safe */
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struct crypto_engine *engine;
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};
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/*
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@ -62,6 +62,15 @@ algs_unlock:
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mutex_unlock(&algs_lock);
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}
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static void caam_jr_crypto_engine_exit(void *data)
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{
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struct device *jrdev = data;
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struct caam_drv_private_jr *jrpriv = dev_get_drvdata(jrdev);
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/* Free the resources of crypto-engine */
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crypto_engine_exit(jrpriv->engine);
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}
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static int caam_reset_hw_jr(struct device *dev)
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{
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struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
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@ -538,6 +547,25 @@ static int caam_jr_probe(struct platform_device *pdev)
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return error;
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}
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/* Initialize crypto engine */
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jrpriv->engine = crypto_engine_alloc_init(jrdev, false);
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if (!jrpriv->engine) {
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dev_err(jrdev, "Could not init crypto-engine\n");
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return -ENOMEM;
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}
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error = devm_add_action_or_reset(jrdev, caam_jr_crypto_engine_exit,
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jrdev);
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if (error)
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return error;
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/* Start crypto engine */
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error = crypto_engine_start(jrpriv->engine);
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if (error) {
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dev_err(jrdev, "Could not start crypto-engine\n");
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return error;
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}
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/* Identify the interrupt */
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jrpriv->irq = irq_of_parse_and_map(nprop, 0);
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if (!jrpriv->irq) {
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