amdgpu/pm: set pp_dpm_dcefclk to readonly on NAVI10 and newer gpus
v2 : change condition to apply to all chips after NAVI10 Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot. Patch prevents user from successfully writing to file pp_dpm_dcefclk on parts NAVI10 and newer, and gives better user feedback that this operation is not allowed. Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1893,6 +1893,14 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
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}
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}
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if (DEVICE_ATTR_IS(pp_dpm_dcefclk)) {
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/* SMU MP1 does not support dcefclk level setting */
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if (asic_type >= CHIP_NAVI10) {
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dev_attr->attr.mode &= ~S_IWUGO;
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dev_attr->store = NULL;
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}
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}
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#undef DEVICE_ATTR_IS
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return 0;
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