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clk: renesas: r8a779a0: Add VSPD clock support

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Add clocks for the VSPD modules on the V3U.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20201216151931.851547-3-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Kieran Bingham 2020-12-16 15:19:30 +00:00 committed by Geert Uytterhoeven
parent 0177b5090e
commit ed447e7d60
1 changed files with 2 additions and 0 deletions
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drivers/clk/renesas/r8a779a0-cpg-mssr.c
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@ -190,6 +190,8 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
DEF_MOD("vspd0", 830, R8A779A0_CLK_S3D1),
DEF_MOD("vspd1", 831, R8A779A0_CLK_S3D1),
};
static spinlock_t cpg_lock;