forked from Minki/linux
drm/amdgpu: move VM table mapping into the backend as well
Clean that up further and also fix another case where the BO wasn't kmapped for CPU based updates. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -659,17 +659,7 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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if (bo->tbo.type != ttm_bo_type_kernel) {
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amdgpu_vm_bo_moved(bo_base);
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} else {
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if (vm->use_cpu_for_update)
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r = amdgpu_bo_kmap(bo, NULL);
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else
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r = amdgpu_ttm_alloc_gart(&bo->tbo);
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if (r)
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break;
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if (bo->shadow) {
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r = amdgpu_ttm_alloc_gart(&bo->shadow->tbo);
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if (r)
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break;
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}
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vm->update_funcs->map_table(bo);
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amdgpu_vm_bo_relocated(bo_base);
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}
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}
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@ -751,22 +741,17 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
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if (r)
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return r;
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r = amdgpu_ttm_alloc_gart(&bo->tbo);
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if (r)
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return r;
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if (bo->shadow) {
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r = ttm_bo_validate(&bo->shadow->tbo, &bo->shadow->placement,
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&ctx);
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if (r)
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return r;
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r = amdgpu_ttm_alloc_gart(&bo->shadow->tbo);
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if (r)
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return r;
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}
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r = vm->update_funcs->map_table(bo);
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if (r)
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return r;
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memset(¶ms, 0, sizeof(params));
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params.adev = adev;
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params.vm = vm;
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@ -877,12 +862,6 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
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if (r)
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return r;
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if (vm->use_cpu_for_update) {
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r = amdgpu_bo_kmap(pt, NULL);
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if (r)
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goto error_free_pt;
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}
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/* Keep a reference to the root directory to avoid
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* freeing them up in the wrong order.
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*/
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@ -215,7 +215,7 @@ struct amdgpu_vm_update_params {
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};
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struct amdgpu_vm_update_funcs {
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int (*map_table)(struct amdgpu_bo *bo);
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int (*prepare)(struct amdgpu_vm_update_params *p, void * owner,
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struct dma_fence *exclusive);
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int (*update)(struct amdgpu_vm_update_params *p,
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@ -24,6 +24,16 @@
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#include "amdgpu_object.h"
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#include "amdgpu_trace.h"
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/**
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* amdgpu_vm_cpu_map_table - make sure new PDs/PTs are kmapped
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*
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* @table: newly allocated or validated PD/PT
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*/
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static int amdgpu_vm_cpu_map_table(struct amdgpu_bo *table)
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{
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return amdgpu_bo_kmap(table, NULL);
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}
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/**
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* amdgpu_vm_cpu_prepare - prepare page table update with the CPU
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*
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@ -110,6 +120,7 @@ static int amdgpu_vm_cpu_commit(struct amdgpu_vm_update_params *p,
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}
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const struct amdgpu_vm_update_funcs amdgpu_vm_cpu_funcs = {
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.map_table = amdgpu_vm_cpu_map_table,
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.prepare = amdgpu_vm_cpu_prepare,
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.update = amdgpu_vm_cpu_update,
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.commit = amdgpu_vm_cpu_commit
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@ -28,6 +28,25 @@
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#define AMDGPU_VM_SDMA_MIN_NUM_DW 256u
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#define AMDGPU_VM_SDMA_MAX_NUM_DW (16u * 1024u)
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/**
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* amdgpu_vm_sdma_map_table - make sure new PDs/PTs are GTT mapped
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*
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* @table: newly allocated or validated PD/PT
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*/
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static int amdgpu_vm_sdma_map_table(struct amdgpu_bo *table)
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{
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int r;
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r = amdgpu_ttm_alloc_gart(&table->tbo);
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if (r)
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return r;
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if (table->shadow)
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r = amdgpu_ttm_alloc_gart(&table->shadow->tbo);
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return r;
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}
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/**
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* amdgpu_vm_sdma_prepare - prepare SDMA command submission
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*
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@ -242,6 +261,7 @@ static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
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}
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const struct amdgpu_vm_update_funcs amdgpu_vm_sdma_funcs = {
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.map_table = amdgpu_vm_sdma_map_table,
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.prepare = amdgpu_vm_sdma_prepare,
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.update = amdgpu_vm_sdma_update,
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.commit = amdgpu_vm_sdma_commit
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