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e1000e: fix legacy interrupt handling in i219

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This fix handles a hardware issue that prevented i219 from
working in legacy interrupts mode (IntMode=0)

Signed-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Yanir Lubetkin 2015-06-02 17:05:42 +03:00 committed by Jeff Kirsher
parent ff9174291e
commit ec945cfbbf
3 changed files with 19 additions and 1 deletions
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5
drivers/net/ethernet/intel/e1000e/ich8lan.h
View File

@ -98,8 +98,11 @@
#define E1000_FEXTNVM6_K1_OFF_ENABLE 0x80000000
/* bit for disabling packet buffer read */
#define E1000_FEXTNVM7_DISABLE_PB_READ 0x00040000
#define E1000_FEXTNVM7_SIDE_CLK_UNGATE 0x00000004
#define E1000_FEXTNVM7_DISABLE_SMB_PERST 0x00000020
#define E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS 0x00000800
#define E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS 0x00001000
#define E1000_FEXTNVM11_DISABLE_PB_READ 0x00000200
#define E1000_FEXTNVM11_DISABLE_MULR_FIX 0x00002000
/* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */

14
drivers/net/ethernet/intel/e1000e/netdev.c
View File

@ -4120,6 +4120,20 @@ void e1000e_reset(struct e1000_adapter *adapter)
phy_data &= ~IGP02E1000_PM_SPD;
e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
}
if (hw->mac.type == e1000_pch_spt && adapter->int_mode == 0) {
u32 reg;
/* Fextnvm7 @ 0xe4[2] = 1 */
reg = er32(FEXTNVM7);
reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
ew32(FEXTNVM7, reg);
/* Fextnvm9 @ 0x5bb4[13:12] = 11 */
reg = er32(FEXTNVM9);
reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
ew32(FEXTNVM9, reg);
}
}
int e1000e_up(struct e1000_adapter *adapter)

1
drivers/net/ethernet/intel/e1000e/regs.h
View File

@ -38,6 +38,7 @@
#define E1000_FEXTNVM4 0x00024 /* Future Extended NVM 4 - RW */
#define E1000_FEXTNVM6 0x00010 /* Future Extended NVM 6 - RW */
#define E1000_FEXTNVM7 0x000E4 /* Future Extended NVM 7 - RW */
#define E1000_FEXTNVM9 0x5BB4 /* Future Extended NVM 9 - RW */
#define E1000_FEXTNVM11 0x5BBC /* Future Extended NVM 11 - RW */
#define E1000_PCIEANACFG 0x00F18 /* PCIE Analog Config */
#define E1000_FCT 0x00030 /* Flow Control Type - RW */