forked from Minki/linux
ALSA: convert users to core bus_parse_capabilities
Now that we have the bus parse capabilities moved to core, we need to convert users. The SKL driver and HDA extended lib needs to converted in single patch, otherwise we regress on the functionality. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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6720b38420
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@ -118,15 +118,15 @@ void snd_hdac_ext_bus_ppcap_enable(struct hdac_ext_bus *ebus, bool enable)
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{
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struct hdac_bus *bus = &ebus->bus;
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if (!ebus->ppcap) {
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if (!bus->ppcap) {
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dev_err(bus->dev, "Address of PP capability is NULL");
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return;
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}
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if (enable)
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snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_GPROCEN);
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_GPROCEN);
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else
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snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_GPROCEN, 0);
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_GPROCEN, 0);
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
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@ -139,15 +139,15 @@ void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_ext_bus *ebus, bool enable)
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{
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struct hdac_bus *bus = &ebus->bus;
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if (!ebus->ppcap) {
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if (!bus->ppcap) {
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dev_err(bus->dev, "Address of PP capability is NULL\n");
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return;
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}
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if (enable)
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snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_PIE);
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_PIE);
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else
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snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_PIE, 0);
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_PIE, 0);
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
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@ -171,7 +171,7 @@ int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus)
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struct hdac_ext_link *hlink;
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struct hdac_bus *bus = &ebus->bus;
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link_count = readl(ebus->mlcap + AZX_REG_ML_MLCD) + 1;
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link_count = readl(bus->mlcap + AZX_REG_ML_MLCD) + 1;
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dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
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@ -181,7 +181,7 @@ int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus)
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return -ENOMEM;
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hlink->index = idx;
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hlink->bus = bus;
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hlink->ml_addr = ebus->mlcap + AZX_ML_BASE +
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hlink->ml_addr = bus->mlcap + AZX_ML_BASE +
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(AZX_ML_INTERVAL * idx);
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hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
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hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
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@ -40,27 +40,27 @@ void snd_hdac_ext_stream_init(struct hdac_ext_bus *ebus,
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{
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struct hdac_bus *bus = &ebus->bus;
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if (ebus->ppcap) {
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stream->pphc_addr = ebus->ppcap + AZX_PPHC_BASE +
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if (bus->ppcap) {
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stream->pphc_addr = bus->ppcap + AZX_PPHC_BASE +
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AZX_PPHC_INTERVAL * idx;
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stream->pplc_addr = ebus->ppcap + AZX_PPLC_BASE +
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stream->pplc_addr = bus->ppcap + AZX_PPLC_BASE +
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AZX_PPLC_MULTI * ebus->num_streams +
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AZX_PPLC_INTERVAL * idx;
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}
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if (ebus->spbcap) {
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stream->spib_addr = ebus->spbcap + AZX_SPB_BASE +
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if (bus->spbcap) {
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stream->spib_addr = bus->spbcap + AZX_SPB_BASE +
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AZX_SPB_INTERVAL * idx +
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AZX_SPB_SPIB;
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stream->fifo_addr = ebus->spbcap + AZX_SPB_BASE +
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stream->fifo_addr = bus->spbcap + AZX_SPB_BASE +
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AZX_SPB_INTERVAL * idx +
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AZX_SPB_MAXFIFO;
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}
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if (ebus->drsmcap)
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stream->dpibr_addr = ebus->drsmcap + AZX_DRSM_BASE +
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if (bus->drsmcap)
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stream->dpibr_addr = bus->drsmcap + AZX_DRSM_BASE +
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AZX_DRSM_INTERVAL * idx;
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stream->decoupled = false;
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@ -131,10 +131,10 @@ void snd_hdac_ext_stream_decouple(struct hdac_ext_bus *ebus,
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spin_lock_irq(&bus->reg_lock);
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if (decouple)
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snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0,
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL, 0,
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AZX_PPCTL_PROCEN(hstream->index));
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else
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snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL,
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
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AZX_PPCTL_PROCEN(hstream->index), 0);
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stream->decoupled = decouple;
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spin_unlock_irq(&bus->reg_lock);
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@ -255,7 +255,7 @@ hdac_ext_link_stream_assign(struct hdac_ext_bus *ebus,
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struct hdac_stream *stream = NULL;
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struct hdac_bus *hbus = &ebus->bus;
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if (!ebus->ppcap) {
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if (!hbus->ppcap) {
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dev_err(hbus->dev, "stream type not supported\n");
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return NULL;
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}
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@ -296,7 +296,7 @@ hdac_ext_host_stream_assign(struct hdac_ext_bus *ebus,
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struct hdac_stream *stream = NULL;
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struct hdac_bus *hbus = &ebus->bus;
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if (!ebus->ppcap) {
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if (!hbus->ppcap) {
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dev_err(hbus->dev, "stream type not supported\n");
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return NULL;
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}
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@ -423,21 +423,21 @@ void snd_hdac_ext_stream_spbcap_enable(struct hdac_ext_bus *ebus,
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u32 register_mask = 0;
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struct hdac_bus *bus = &ebus->bus;
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if (!ebus->spbcap) {
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if (!bus->spbcap) {
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dev_err(bus->dev, "Address of SPB capability is NULL");
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return;
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}
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mask |= (1 << index);
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register_mask = readl(ebus->spbcap + AZX_REG_SPB_SPBFCCTL);
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register_mask = readl(bus->spbcap + AZX_REG_SPB_SPBFCCTL);
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mask |= register_mask;
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if (enable)
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snd_hdac_updatel(ebus->spbcap, AZX_REG_SPB_SPBFCCTL, 0, mask);
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snd_hdac_updatel(bus->spbcap, AZX_REG_SPB_SPBFCCTL, 0, mask);
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else
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snd_hdac_updatel(ebus->spbcap, AZX_REG_SPB_SPBFCCTL, mask, 0);
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snd_hdac_updatel(bus->spbcap, AZX_REG_SPB_SPBFCCTL, mask, 0);
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_spbcap_enable);
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@ -452,7 +452,7 @@ int snd_hdac_ext_stream_set_spib(struct hdac_ext_bus *ebus,
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{
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struct hdac_bus *bus = &ebus->bus;
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if (!ebus->spbcap) {
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if (!bus->spbcap) {
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dev_err(bus->dev, "Address of SPB capability is NULL");
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return -EINVAL;
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}
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@ -475,7 +475,7 @@ int snd_hdac_ext_stream_get_spbmaxfifo(struct hdac_ext_bus *ebus,
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{
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struct hdac_bus *bus = &ebus->bus;
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if (!ebus->spbcap) {
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if (!bus->spbcap) {
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dev_err(bus->dev, "Address of SPB capability is NULL");
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return -EINVAL;
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}
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@ -515,21 +515,21 @@ void snd_hdac_ext_stream_drsm_enable(struct hdac_ext_bus *ebus,
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u32 register_mask = 0;
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struct hdac_bus *bus = &ebus->bus;
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if (!ebus->drsmcap) {
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if (!bus->drsmcap) {
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dev_err(bus->dev, "Address of DRSM capability is NULL");
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return;
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}
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mask |= (1 << index);
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register_mask = readl(ebus->drsmcap + AZX_REG_SPB_SPBFCCTL);
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register_mask = readl(bus->drsmcap + AZX_REG_SPB_SPBFCCTL);
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mask |= register_mask;
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if (enable)
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snd_hdac_updatel(ebus->drsmcap, AZX_REG_DRSM_CTL, 0, mask);
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snd_hdac_updatel(bus->drsmcap, AZX_REG_DRSM_CTL, 0, mask);
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else
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snd_hdac_updatel(ebus->drsmcap, AZX_REG_DRSM_CTL, mask, 0);
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snd_hdac_updatel(bus->drsmcap, AZX_REG_DRSM_CTL, mask, 0);
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_drsm_enable);
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@ -544,7 +544,7 @@ int snd_hdac_ext_stream_set_dpibr(struct hdac_ext_bus *ebus,
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{
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struct hdac_bus *bus = &ebus->bus;
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if (!ebus->drsmcap) {
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if (!bus->drsmcap) {
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dev_err(bus->dev, "Address of DRSM capability is NULL");
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return -EINVAL;
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}
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@ -296,7 +296,7 @@ int skl_suspend_dsp(struct skl *skl)
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int ret;
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/* if ppcap is not supported return 0 */
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if (!skl->ebus.ppcap)
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if (!skl->ebus.bus.ppcap)
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return 0;
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ret = skl_dsp_sleep(ctx->dsp);
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@ -316,7 +316,7 @@ int skl_resume_dsp(struct skl *skl)
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int ret;
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/* if ppcap is not supported return 0 */
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if (!skl->ebus.ppcap)
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if (!skl->ebus.bus.ppcap)
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return 0;
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/* enable ppcap interrupt */
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@ -106,7 +106,7 @@ static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
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static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
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{
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if (ebus->ppcap)
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if ((ebus_to_hbus(ebus))->ppcap)
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return HDAC_EXT_STREAM_TYPE_HOST;
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else
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return HDAC_EXT_STREAM_TYPE_COUPLED;
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@ -188,7 +188,7 @@ static int skl_get_format(struct snd_pcm_substream *substream,
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struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
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int format_val = 0;
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if (ebus->ppcap) {
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if ((ebus_to_hbus(ebus))->ppcap) {
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struct snd_pcm_runtime *runtime = substream->runtime;
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format_val = snd_hdac_calc_stream_format(runtime->rate,
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@ -1020,7 +1020,7 @@ static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
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{
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struct hdac_ext_bus *ebus = get_bus_ctx(substream);
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if (!ebus->ppcap)
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if ((ebus_to_hbus(ebus))->ppcap)
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return skl_coupled_trigger(substream, cmd);
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return 0;
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@ -1144,7 +1144,7 @@ static int skl_platform_soc_probe(struct snd_soc_platform *platform)
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struct skl *skl = ebus_to_skl(ebus);
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int ret;
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if (ebus->ppcap) {
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if ((ebus_to_hbus(ebus))->ppcap) {
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ret = skl_tplg_init(platform, ebus);
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if (ret < 0) {
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dev_err(platform->dev, "Failed to init topology!\n");
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@ -587,7 +587,7 @@ static int skl_first_init(struct hdac_ext_bus *ebus)
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return -ENXIO;
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}
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snd_hdac_ext_bus_parse_capabilities(ebus);
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snd_hdac_bus_parse_capabilities(bus);
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if (skl_acquire_irq(ebus, 0) < 0)
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return -EBUSY;
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@ -682,7 +682,7 @@ static int skl_probe(struct pci_dev *pci,
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skl_dmic_data.dmic_num = skl_get_dmic_geo(skl);
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/* check if dsp is there */
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if (ebus->ppcap) {
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if (bus->ppcap) {
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err = skl_machine_device_register(skl,
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(void *)pci_id->driver_data);
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if (err < 0)
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@ -696,7 +696,7 @@ static int skl_probe(struct pci_dev *pci,
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skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge;
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}
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if (ebus->mlcap)
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if (bus->mlcap)
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snd_hdac_ext_bus_get_ml_capabilities(ebus);
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/* create device for soc dmic */
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