forked from Minki/linux
Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks OMAP2+: PM/serial: fix console semaphore acquire during suspend OMAP1: SRAM: fix size for OMAP1611 SoCs arm: omap2: io: fix clk_get() error check arm: plat-omap: counter_32k: use IS_ERR() instead of NULL check omap: nand: remove hardware ECC as default omap: zoom: wl1271 slot is MMC_CAP_POWER_OFF_CARD omap: PM debug: fix wake-on-timer debugfs dependency
This commit is contained in:
commit
ec5d043f28
@ -216,7 +216,7 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
|
||||
{
|
||||
.name = "wl1271",
|
||||
.mmc = 3,
|
||||
.caps = MMC_CAP_4_BIT_DATA,
|
||||
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
|
||||
.gpio_wp = -EINVAL,
|
||||
.gpio_cd = -EINVAL,
|
||||
.nonremovable = true,
|
||||
|
@ -297,7 +297,7 @@ static int __init _omap2_init_reprogram_sdrc(void)
|
||||
return 0;
|
||||
|
||||
dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
|
||||
if (!dpll3_m2_ck)
|
||||
if (IS_ERR(dpll3_m2_ck))
|
||||
return -EINVAL;
|
||||
|
||||
rate = clk_get_rate(dpll3_m2_ck);
|
||||
|
@ -161,6 +161,23 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
|
||||
printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
|
||||
}
|
||||
|
||||
void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
|
||||
{
|
||||
u32 tick_rate, cycles;
|
||||
|
||||
if (!seconds && !milliseconds)
|
||||
return;
|
||||
|
||||
tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
|
||||
cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
|
||||
omap_dm_timer_stop(gptimer_wakeup);
|
||||
omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
|
||||
|
||||
pr_info("PM: Resume timer in %u.%03u secs"
|
||||
" (%d ticks at %d ticks/sec.)\n",
|
||||
seconds, milliseconds, cycles, tick_rate);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
@ -354,23 +371,6 @@ void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
|
||||
pwrdm->timer = t;
|
||||
}
|
||||
|
||||
void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
|
||||
{
|
||||
u32 tick_rate, cycles;
|
||||
|
||||
if (!seconds && !milliseconds)
|
||||
return;
|
||||
|
||||
tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
|
||||
cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
|
||||
omap_dm_timer_stop(gptimer_wakeup);
|
||||
omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
|
||||
|
||||
pr_info("PM: Resume timer in %u.%03u secs"
|
||||
" (%d ticks at %d ticks/sec.)\n",
|
||||
seconds, milliseconds, cycles, tick_rate);
|
||||
}
|
||||
|
||||
static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
|
||||
{
|
||||
struct seq_file *s = (struct seq_file *)user;
|
||||
|
@ -53,6 +53,19 @@
|
||||
#include <plat/powerdomain.h>
|
||||
#include <plat/clockdomain.h>
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
static suspend_state_t suspend_state = PM_SUSPEND_ON;
|
||||
static inline bool is_suspending(void)
|
||||
{
|
||||
return (suspend_state != PM_SUSPEND_ON);
|
||||
}
|
||||
#else
|
||||
static inline bool is_suspending(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void (*omap2_sram_idle)(void);
|
||||
static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
|
||||
void __iomem *sdrc_power);
|
||||
@ -120,8 +133,9 @@ static void omap2_enter_full_retention(void)
|
||||
goto no_sleep;
|
||||
|
||||
/* Block console output in case it is on one of the OMAP UARTs */
|
||||
if (try_acquire_console_sem())
|
||||
goto no_sleep;
|
||||
if (!is_suspending())
|
||||
if (try_acquire_console_sem())
|
||||
goto no_sleep;
|
||||
|
||||
omap_uart_prepare_idle(0);
|
||||
omap_uart_prepare_idle(1);
|
||||
@ -136,7 +150,8 @@ static void omap2_enter_full_retention(void)
|
||||
omap_uart_resume_idle(1);
|
||||
omap_uart_resume_idle(0);
|
||||
|
||||
release_console_sem();
|
||||
if (!is_suspending())
|
||||
release_console_sem();
|
||||
|
||||
no_sleep:
|
||||
if (omap2_pm_debug) {
|
||||
@ -284,6 +299,12 @@ out:
|
||||
local_irq_enable();
|
||||
}
|
||||
|
||||
static int omap2_pm_begin(suspend_state_t state)
|
||||
{
|
||||
suspend_state = state;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int omap2_pm_prepare(void)
|
||||
{
|
||||
/* We cannot sleep in idle until we have resumed */
|
||||
@ -333,10 +354,17 @@ static void omap2_pm_finish(void)
|
||||
enable_hlt();
|
||||
}
|
||||
|
||||
static void omap2_pm_end(void)
|
||||
{
|
||||
suspend_state = PM_SUSPEND_ON;
|
||||
}
|
||||
|
||||
static struct platform_suspend_ops omap_pm_ops = {
|
||||
.begin = omap2_pm_begin,
|
||||
.prepare = omap2_pm_prepare,
|
||||
.enter = omap2_pm_enter,
|
||||
.finish = omap2_pm_finish,
|
||||
.end = omap2_pm_end,
|
||||
.valid = suspend_valid_only_mem,
|
||||
};
|
||||
|
||||
|
@ -50,6 +50,19 @@
|
||||
#include "sdrc.h"
|
||||
#include "control.h"
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
static suspend_state_t suspend_state = PM_SUSPEND_ON;
|
||||
static inline bool is_suspending(void)
|
||||
{
|
||||
return (suspend_state != PM_SUSPEND_ON);
|
||||
}
|
||||
#else
|
||||
static inline bool is_suspending(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Scratchpad offsets */
|
||||
#define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4
|
||||
#define OMAP343X_TABLE_VALUE_OFFSET 0xc0
|
||||
@ -387,10 +400,11 @@ void omap_sram_idle(void)
|
||||
}
|
||||
|
||||
/* Block console output in case it is on one of the OMAP UARTs */
|
||||
if (per_next_state < PWRDM_POWER_ON ||
|
||||
core_next_state < PWRDM_POWER_ON)
|
||||
if (try_acquire_console_sem())
|
||||
goto console_still_active;
|
||||
if (!is_suspending())
|
||||
if (per_next_state < PWRDM_POWER_ON ||
|
||||
core_next_state < PWRDM_POWER_ON)
|
||||
if (try_acquire_console_sem())
|
||||
goto console_still_active;
|
||||
|
||||
/* PER */
|
||||
if (per_next_state < PWRDM_POWER_ON) {
|
||||
@ -470,7 +484,8 @@ void omap_sram_idle(void)
|
||||
omap_uart_resume_idle(3);
|
||||
}
|
||||
|
||||
release_console_sem();
|
||||
if (!is_suspending())
|
||||
release_console_sem();
|
||||
|
||||
console_still_active:
|
||||
/* Disable IO-PAD and IO-CHAIN wakeup */
|
||||
@ -514,8 +529,6 @@ out:
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
static suspend_state_t suspend_state;
|
||||
|
||||
static int omap3_pm_prepare(void)
|
||||
{
|
||||
disable_hlt();
|
||||
|
@ -243,13 +243,14 @@
|
||||
#define OMAP24XX_EN_GPT1_MASK (1 << 0)
|
||||
|
||||
/* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */
|
||||
#define OMAP24XX_ST_GPIOS_SHIFT (1 << 2)
|
||||
#define OMAP24XX_ST_GPIOS_MASK 2
|
||||
#define OMAP24XX_ST_GPT1_SHIFT (1 << 0)
|
||||
#define OMAP24XX_ST_GPT1_MASK 0
|
||||
#define OMAP24XX_ST_GPIOS_SHIFT 2
|
||||
#define OMAP24XX_ST_GPIOS_MASK (1 << 2)
|
||||
#define OMAP24XX_ST_GPT1_SHIFT 0
|
||||
#define OMAP24XX_ST_GPT1_MASK (1 << 0)
|
||||
|
||||
/* CM_IDLEST_MDM and PM_WKST_MDM shared bits */
|
||||
#define OMAP2430_ST_MDM_SHIFT (1 << 0)
|
||||
#define OMAP2430_ST_MDM_SHIFT 0
|
||||
#define OMAP2430_ST_MDM_MASK (1 << 0)
|
||||
|
||||
|
||||
/* 3430 register bits shared between CM & PRM registers */
|
||||
|
@ -16,6 +16,7 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <plat/common.h>
|
||||
#include <plat/board.h>
|
||||
@ -164,7 +165,7 @@ static int __init omap_init_clocksource_32k(void)
|
||||
return -ENODEV;
|
||||
|
||||
sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
|
||||
if (sync_32k_ick)
|
||||
if (!IS_ERR(sync_32k_ick))
|
||||
clk_enable(sync_32k_ick);
|
||||
|
||||
clocksource_32k.mult = clocksource_hz2mult(32768,
|
||||
|
@ -166,7 +166,7 @@ static void __init omap_detect_sram(void)
|
||||
cpu_is_omap1710())
|
||||
omap_sram_size = 0x4000; /* 16K */
|
||||
else if (cpu_is_omap1611())
|
||||
omap_sram_size = 0x3e800; /* 250K */
|
||||
omap_sram_size = SZ_256K;
|
||||
else {
|
||||
printk(KERN_ERR "Could not detect SRAM size\n");
|
||||
omap_sram_size = 0x4000;
|
||||
|
@ -7,7 +7,6 @@
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#define CONFIG_MTD_NAND_OMAP_HWECC
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
|
Loading…
Reference in New Issue
Block a user