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drm/amd/display: Add detile buffer size for DCN20

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Detile buffer size affects dcc caps and therefore needs to be
corrected for each ip.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin
2019-09-03 14:10:28 -04:00
committed by Alex Deucher
parent 08b662793b
commit ec4388a267
2 changed files with 5 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c
View File

@@ -186,14 +186,13 @@ static void hubbub2_get_blk256_size(unsigned int *blk256_width, unsigned int *bl
} }
static void hubbub2_det_request_size( static void hubbub2_det_request_size(
unsigned int detile_buf_size,
unsigned int height, unsigned int height,
unsigned int width, unsigned int width,
unsigned int bpe, unsigned int bpe,
bool *req128_horz_wc, bool *req128_horz_wc,
bool *req128_vert_wc) bool *req128_vert_wc)
{ {
unsigned int detile_buf_size = 164 * 1024; /* 164KB for DCN1.0 */
unsigned int blk256_height = 0; unsigned int blk256_height = 0;
unsigned int blk256_width = 0; unsigned int blk256_width = 0;
unsigned int swath_bytes_horz_wc, swath_bytes_vert_wc; unsigned int swath_bytes_horz_wc, swath_bytes_vert_wc;
@@ -236,7 +235,8 @@ bool hubbub2_get_dcc_compression_cap(struct hubbub *hubbub,
&segment_order_horz, &segment_order_vert)) &segment_order_horz, &segment_order_vert))
return false; return false;
hubbub2_det_request_size(input->surface_size.height, input->surface_size.width, hubbub2_det_request_size(TO_DCN20_HUBBUB(hubbub)->detile_buf_size,
input->surface_size.height, input->surface_size.width,
bpe, &req128_horz_wc, &req128_vert_wc); bpe, &req128_horz_wc, &req128_vert_wc);
if (!req128_horz_wc && !req128_vert_wc) { if (!req128_horz_wc && !req128_vert_wc) {
@@ -619,4 +619,5 @@ void hubbub2_construct(struct dcn20_hubbub *hubbub,
hubbub->masks = hubbub_mask; hubbub->masks = hubbub_mask;
hubbub->debug_test_index_pstate = 0xB; hubbub->debug_test_index_pstate = 0xB;
hubbub->detile_buf_size = 164 * 1024; /* 164KB for DCN2.0 */
} }

1
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h
View File

@@ -81,6 +81,7 @@ struct dcn20_hubbub {
unsigned int debug_test_index_pstate; unsigned int debug_test_index_pstate;
struct dcn_watermark_set watermarks; struct dcn_watermark_set watermarks;
struct dcn20_vmid vmid[16]; struct dcn20_vmid vmid[16];
unsigned int detile_buf_size;
}; };
void hubbub2_construct(struct dcn20_hubbub *hubbub, void hubbub2_construct(struct dcn20_hubbub *hubbub,