spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods

The original implementation set num_chipselect to ROCKCHIP_SPI_MAX_CS_NUM (2)
which seems wrong here. spi0 has 2 native cs, all others just one. With
enable and use of cs_gpiods / GPIO CS, its correct to set the num_chipselect
from the num-cs property and set max_native_cs with the define.
If num-cs is missing the default set to num_chipselect = 1.

Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
Link: https://lore.kernel.org/r/20200511083022.23678-4-chris.ruehl@gtsys.com.hk
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Chris Ruehl 2020-05-11 16:30:22 +08:00 committed by Mark Brown
parent d065f41a3f
commit eb1262e3cc
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@ -708,8 +708,15 @@ static int rockchip_spi_probe(struct platform_device *pdev)
ctlr->slave_abort = rockchip_spi_slave_abort;
} else {
ctlr->flags = SPI_MASTER_GPIO_SS;
ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM;
/*
* rk spi0 has two native cs, spi1..5 one cs only
* if num-cs is missing in the dts, default to 1
*/
if (of_property_read_u16(np, "num-cs", &ctlr->num_chipselect))
ctlr->num_chipselect = 1;
ctlr->use_gpio_descriptors = true;
}
ctlr->num_chipselect = ROCKCHIP_SPI_MAX_CS_NUM;
ctlr->dev.of_node = pdev->dev.of_node;
ctlr->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4);
ctlr->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX;