forked from Minki/linux
drm/i915/guc: Keep GuC interrupts enabled when using GuC
The GuC log contains a separate space used for crash dump. We even get a separate notification for it. While we're not handling crash differently yet, it makes sense to decouple the two right now to simplify the following patches. v2: Move guc_log_flush_irq_disable up to avoid movement in following patches (Sagar). v3: s/guc_log_flush_irq_*/guc_flush_log_msg_*, rebase after mass rename Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> (v2) Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180319095348.9716-1-michal.winiarski@intel.com
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@ -67,6 +67,7 @@ void intel_guc_init_early(struct intel_guc *guc)
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intel_guc_log_init_early(&guc->log);
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mutex_init(&guc->send_mutex);
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spin_lock_init(&guc->irq_lock);
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guc->send = intel_guc_send_nop;
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guc->notify = gen8_guc_raise_irq;
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}
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@ -368,7 +369,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len)
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void intel_guc_to_host_event_handler(struct intel_guc *guc)
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{
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struct drm_i915_private *dev_priv = guc_to_i915(guc);
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u32 msg, flush;
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u32 msg, val;
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/*
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* Sample the log buffer flush related bits & clear them out now
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@ -381,24 +382,18 @@ void intel_guc_to_host_event_handler(struct intel_guc *guc)
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* could happen that GuC sets the bit for 2nd interrupt but Host
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* clears out the bit on handling the 1st interrupt.
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*/
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spin_lock(&guc->irq_lock);
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val = I915_READ(SOFT_SCRATCH(15));
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msg = val & guc->msg_enabled_mask;
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I915_WRITE(SOFT_SCRATCH(15), val & ~msg);
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spin_unlock(&guc->irq_lock);
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msg = I915_READ(SOFT_SCRATCH(15));
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flush = msg & (INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED |
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INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER);
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if (flush) {
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/* Clear the message bits that are handled */
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I915_WRITE(SOFT_SCRATCH(15), msg & ~flush);
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/* Handle flush interrupt in bottom half */
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if (msg & (INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER |
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INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED)) {
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queue_work(guc->log.runtime.flush_wq,
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&guc->log.runtime.flush_work);
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guc->log.flush_interrupt_count++;
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} else {
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/*
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* Not clearing of unhandled event bits won't result in
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* re-triggering of the interrupt.
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*/
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}
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}
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@ -56,7 +56,9 @@ struct intel_guc {
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struct drm_i915_gem_object *load_err_log;
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/* intel_guc_recv interrupt related state */
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spinlock_t irq_lock;
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bool interrupts_enabled;
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unsigned int msg_enabled_mask;
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struct i915_vma *ads_vma;
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struct i915_vma *stage_desc_pool;
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@ -73,6 +73,22 @@ static int guc_log_control(struct intel_guc *guc, bool enable, u32 verbosity)
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return intel_guc_send(guc, action, ARRAY_SIZE(action));
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}
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static void guc_flush_log_msg_enable(struct intel_guc *guc)
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{
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spin_lock_irq(&guc->irq_lock);
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guc->msg_enabled_mask |= INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER |
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INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED;
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spin_unlock_irq(&guc->irq_lock);
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}
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static void guc_flush_log_msg_disable(struct intel_guc *guc)
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{
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spin_lock_irq(&guc->irq_lock);
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guc->msg_enabled_mask &= ~(INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER |
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INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED);
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spin_unlock_irq(&guc->irq_lock);
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}
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static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
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{
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return container_of(log, struct intel_guc, log);
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@ -709,12 +725,7 @@ int intel_guc_log_register(struct intel_guc_log *log)
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if (ret)
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goto err_runtime;
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/* GuC logging is currently the only user of Guc2Host interrupts */
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mutex_lock(&i915->drm.struct_mutex);
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intel_runtime_pm_get(i915);
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gen9_enable_guc_interrupts(i915);
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intel_runtime_pm_put(i915);
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mutex_unlock(&i915->drm.struct_mutex);
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guc_flush_log_msg_enable(guc);
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return 0;
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@ -733,6 +744,8 @@ void intel_guc_log_unregister(struct intel_guc_log *log)
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struct intel_guc *guc = log_to_guc(log);
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struct drm_i915_private *i915 = guc_to_i915(guc);
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guc_flush_log_msg_disable(guc);
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/*
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* Once logging is disabled, GuC won't generate logs & send an
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* interrupt. But there could be some data in the log buffer
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@ -742,12 +755,6 @@ void intel_guc_log_unregister(struct intel_guc_log *log)
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guc_flush_logs(log);
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mutex_lock(&i915->drm.struct_mutex);
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/* GuC logging is currently the only user of Guc2Host interrupts */
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intel_runtime_pm_get(i915);
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gen9_disable_guc_interrupts(i915);
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intel_runtime_pm_put(i915);
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guc_log_runtime_destroy(log);
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mutex_unlock(&i915->drm.struct_mutex);
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@ -247,6 +247,8 @@ static int guc_enable_communication(struct intel_guc *guc)
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{
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struct drm_i915_private *dev_priv = guc_to_i915(guc);
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gen9_enable_guc_interrupts(dev_priv);
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if (HAS_GUC_CT(dev_priv))
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return intel_guc_enable_ct(guc);
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@ -261,6 +263,8 @@ static void guc_disable_communication(struct intel_guc *guc)
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if (HAS_GUC_CT(dev_priv))
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intel_guc_disable_ct(guc);
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gen9_disable_guc_interrupts(dev_priv);
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guc->send = intel_guc_send_nop;
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}
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@ -413,12 +417,9 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
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}
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if (USES_GUC_SUBMISSION(dev_priv)) {
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if (i915_modparams.guc_log_level)
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gen9_enable_guc_interrupts(dev_priv);
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ret = intel_guc_submission_enable(guc);
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if (ret)
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goto err_interrupts;
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goto err_communication;
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}
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dev_info(dev_priv->drm.dev, "GuC firmware version %u.%u\n",
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@ -433,8 +434,6 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
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/*
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* We've failed to load the firmware :(
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*/
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err_interrupts:
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gen9_disable_guc_interrupts(dev_priv);
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err_communication:
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guc_disable_communication(guc);
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err_log_capture:
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@ -464,9 +463,6 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
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intel_guc_submission_disable(guc);
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guc_disable_communication(guc);
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if (USES_GUC_SUBMISSION(dev_priv))
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gen9_disable_guc_interrupts(dev_priv);
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}
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int intel_uc_suspend(struct drm_i915_private *i915)
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