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RK3328 mmc clockrate limit and addition of vpu node as well

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as a regulator fix for the rk3328-rock64.
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Merge tag 'v5.4-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

RK3328 mmc clockrate limit and addition of vpu node as well
as a regulator fix for the rk3328-rock64.

* tag 'v5.4-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: limit clock rate of MMC controllers for RK3328
  arm64: dts: rockchip: add rk3328 VPU node
  arm64: dts: rockchip: fix vcc_host_5v regulator for usb3 host

Link: https://lore.kernel.org/r/43564855.cWDBQSyQMS@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2019-09-05 17:53:07 +02:00
commit eac68a768a
2 changed files with 18 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
View File

@ -34,10 +34,9 @@
vcc_host_5v: vcc-host-5v-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usb30_host_drv>;
pinctrl-0 = <&usb20_host_drv>;
regulator-name = "vcc_host_5v";
regulator-always-on;
regulator-boot-on;
@ -320,12 +319,6 @@
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb3 {
usb30_host_drv: usb30-host-drv {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdmmc {

17
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View File

@ -278,6 +278,7 @@
};
pd_vpu@RK3328_PD_VPU {
reg = <RK3328_PD_VPU>;
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
};
};
@ -596,6 +597,17 @@
status = "disabled";
};
vpu: video-codec@ff350000 {
compatible = "rockchip,rk3328-vpu";
reg = <0x0 0xff350000 0x0 0x800>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vdpu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "hclk";
iommus = <&vpu_mmu>;
power-domains = <&power RK3328_PD_VPU>;
};
vpu_mmu: iommu@ff350800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff350800 0x0 0x40>;
@ -604,7 +616,7 @@
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
status = "disabled";
power-domains = <&power RK3328_PD_VPU>;
};
rkvdec_mmu: iommu@ff360480 {
@ -801,6 +813,7 @@
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
status = "disabled";
};
@ -812,6 +825,7 @@
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
status = "disabled";
};
@ -823,6 +837,7 @@
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
status = "disabled";
};