forked from Minki/linux
ARM: dts: am43xx clock data
Add USB and USB PHY reference clock data Signed-off-by: George Cherian <george.cherian@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> [tony@atomide.com: tabified] Signed-off-by: Tony Lindgren <tony@atomide.com>
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eac1cd3bd6
@ -653,4 +653,36 @@
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clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>;
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reg = <0x4260>;
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};
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usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&usbphy_32khz_clkmux>;
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ti,bit-shift = <8>;
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reg = <0x2a40>;
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};
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usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&usbphy_32khz_clkmux>;
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ti,bit-shift = <8>;
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reg = <0x2a48>;
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};
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usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&dpll_per_clkdcoldo>;
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ti,bit-shift = <8>;
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reg = <0x8a60>;
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};
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usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&dpll_per_clkdcoldo>;
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ti,bit-shift = <8>;
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reg = <0x8a68>;
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};
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};
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