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e1000e: long access timeouts when I217/I218 MAC and PHY are out of sync

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When the MAC and PHY are in two different modes (different power levels
and interconnect speeds), it could take a long time before a PHY register
access timed out using the existing MAC-PHY interconnect configuration
coded into the driver for ICH- and PCH-based LOMs.  Introduce an I217/I218-
specific .setup_physical_interface operation which does not override the
interconnect configuration in the NVM.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Bruce Allan 2013-03-06 09:02:47 +00:00 committed by Jeff Kirsher
parent 86a80eab8c
commit ea8179a728
1 changed files with 28 additions and 1 deletions
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29
drivers/net/ethernet/intel/e1000e/ich8lan.c
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@ -142,6 +142,7 @@ static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);
static void e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index); static void e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);
static s32 e1000_k1_workaround_lv(struct e1000_hw *hw); static s32 e1000_k1_workaround_lv(struct e1000_hw *hw);
static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate); static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate);
static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw);
static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
{ {
@ -636,6 +637,8 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
if (mac->type == e1000_pch_lpt) { if (mac->type == e1000_pch_lpt) {
mac->rar_entry_count = E1000_PCH_LPT_RAR_ENTRIES; mac->rar_entry_count = E1000_PCH_LPT_RAR_ENTRIES;
mac->ops.rar_set = e1000_rar_set_pch_lpt; mac->ops.rar_set = e1000_rar_set_pch_lpt;
mac->ops.setup_physical_interface =
e1000_setup_copper_link_pch_lpt;
} }
/* Enable PCS Lock-loss workaround for ICH8 */ /* Enable PCS Lock-loss workaround for ICH8 */
@ -3788,7 +3791,6 @@ static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)
break; break;
case e1000_phy_82577: case e1000_phy_82577:
case e1000_phy_82579: case e1000_phy_82579:
case e1000_phy_i217:
ret_val = e1000_copper_link_setup_82577(hw); ret_val = e1000_copper_link_setup_82577(hw);
if (ret_val) if (ret_val)
return ret_val; return ret_val;
@ -3823,6 +3825,31 @@ static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)
return e1000e_setup_copper_link(hw); return e1000e_setup_copper_link(hw);
} }
/**
* e1000_setup_copper_link_pch_lpt - Configure MAC/PHY interface
* @hw: pointer to the HW structure
*
* Calls the PHY specific link setup function and then calls the
* generic setup_copper_link to finish configuring the link for
* Lynxpoint PCH devices
**/
static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw)
{
u32 ctrl;
s32 ret_val;
ctrl = er32(CTRL);
ctrl |= E1000_CTRL_SLU;
ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
ew32(CTRL, ctrl);
ret_val = e1000_copper_link_setup_82577(hw);
if (ret_val)
return ret_val;
return e1000e_setup_copper_link(hw);
}
/** /**
* e1000_get_link_up_info_ich8lan - Get current link speed and duplex * e1000_get_link_up_info_ich8lan - Get current link speed and duplex
* @hw: pointer to the HW structure * @hw: pointer to the HW structure