e1000e: long access timeouts when I217/I218 MAC and PHY are out of sync
When the MAC and PHY are in two different modes (different power levels and interconnect speeds), it could take a long time before a PHY register access timed out using the existing MAC-PHY interconnect configuration coded into the driver for ICH- and PCH-based LOMs. Introduce an I217/I218- specific .setup_physical_interface operation which does not override the interconnect configuration in the NVM. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -142,6 +142,7 @@ static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);
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static void e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);
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static s32 e1000_k1_workaround_lv(struct e1000_hw *hw);
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static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate);
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static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw);
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static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
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{
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@ -636,6 +637,8 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
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if (mac->type == e1000_pch_lpt) {
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mac->rar_entry_count = E1000_PCH_LPT_RAR_ENTRIES;
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mac->ops.rar_set = e1000_rar_set_pch_lpt;
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mac->ops.setup_physical_interface =
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e1000_setup_copper_link_pch_lpt;
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}
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/* Enable PCS Lock-loss workaround for ICH8 */
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@ -3788,7 +3791,6 @@ static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)
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break;
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case e1000_phy_82577:
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case e1000_phy_82579:
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case e1000_phy_i217:
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ret_val = e1000_copper_link_setup_82577(hw);
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if (ret_val)
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return ret_val;
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@ -3823,6 +3825,31 @@ static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)
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return e1000e_setup_copper_link(hw);
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}
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/**
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* e1000_setup_copper_link_pch_lpt - Configure MAC/PHY interface
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* @hw: pointer to the HW structure
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*
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* Calls the PHY specific link setup function and then calls the
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* generic setup_copper_link to finish configuring the link for
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* Lynxpoint PCH devices
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**/
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static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw)
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{
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u32 ctrl;
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s32 ret_val;
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ctrl = er32(CTRL);
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ctrl |= E1000_CTRL_SLU;
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ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
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ew32(CTRL, ctrl);
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ret_val = e1000_copper_link_setup_82577(hw);
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if (ret_val)
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return ret_val;
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return e1000e_setup_copper_link(hw);
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}
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/**
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* e1000_get_link_up_info_ich8lan - Get current link speed and duplex
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* @hw: pointer to the HW structure
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