drm/amd/powerplay: add sys interface for set sclk_od/mclk_od for smu
Add sys interface for set pp_sclk_od and pp_mclk_od for smu. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -1069,14 +1069,19 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev,
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count = -EINVAL;
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goto fail;
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}
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if (adev->powerplay.pp_funcs->set_sclk_od)
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amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);
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if (adev->powerplay.pp_funcs->dispatch_tasks) {
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amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
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if (is_support_sw_smu(adev)) {
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value = smu_set_od_percentage(&(adev->smu), OD_SCLK, (uint32_t)value);
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} else {
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adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
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amdgpu_pm_compute_clocks(adev);
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if (adev->powerplay.pp_funcs->set_sclk_od)
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amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);
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if (adev->powerplay.pp_funcs->dispatch_tasks) {
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amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
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} else {
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adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
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amdgpu_pm_compute_clocks(adev);
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}
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}
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fail:
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@@ -1115,14 +1120,19 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev,
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count = -EINVAL;
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goto fail;
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}
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if (adev->powerplay.pp_funcs->set_mclk_od)
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amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);
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if (adev->powerplay.pp_funcs->dispatch_tasks) {
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amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
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if (is_support_sw_smu(adev)) {
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value = smu_set_od_percentage(&(adev->smu), OD_MCLK, (uint32_t)value);
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} else {
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adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
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amdgpu_pm_compute_clocks(adev);
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if (adev->powerplay.pp_funcs->set_mclk_od)
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amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);
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if (adev->powerplay.pp_funcs->dispatch_tasks) {
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amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
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} else {
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adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
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amdgpu_pm_compute_clocks(adev);
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}
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}
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fail:
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