forked from Minki/linux
clk: meson: remove clk input helper
The clk input function which allows clock controllers to register a bypass clock from a clock producer is no longer needed anymore since meson clock controllers have migrated to a new parent allocation method. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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@ -1,7 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0-only
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# SPDX-License-Identifier: GPL-2.0-only
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config COMMON_CLK_MESON_INPUT
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tristate
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config COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_REGMAP
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tristate
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tristate
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select REGMAP
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select REGMAP
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@ -4,7 +4,6 @@
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obj-$(CONFIG_COMMON_CLK_MESON_AO_CLKC) += meson-aoclk.o
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obj-$(CONFIG_COMMON_CLK_MESON_AO_CLKC) += meson-aoclk.o
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obj-$(CONFIG_COMMON_CLK_MESON_DUALDIV) += clk-dualdiv.o
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obj-$(CONFIG_COMMON_CLK_MESON_DUALDIV) += clk-dualdiv.o
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obj-$(CONFIG_COMMON_CLK_MESON_EE_CLKC) += meson-eeclk.o
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obj-$(CONFIG_COMMON_CLK_MESON_EE_CLKC) += meson-eeclk.o
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obj-$(CONFIG_COMMON_CLK_MESON_INPUT) += clk-input.o
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obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o
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obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o
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obj-$(CONFIG_COMMON_CLK_MESON_PHASE) += clk-phase.o
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obj-$(CONFIG_COMMON_CLK_MESON_PHASE) += clk-phase.o
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obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o
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obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o
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@ -1,49 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (c) 2018 BayLibre, SAS.
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include "clk-input.h"
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static const struct clk_ops meson_clk_no_ops = {};
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struct clk_hw *meson_clk_hw_register_input(struct device *dev,
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const char *of_name,
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const char *clk_name,
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unsigned long flags)
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{
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struct clk *parent_clk = devm_clk_get(dev, of_name);
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struct clk_init_data init;
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const char *parent_name;
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struct clk_hw *hw;
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int ret;
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if (IS_ERR(parent_clk))
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return (struct clk_hw *)parent_clk;
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hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
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if (!hw)
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return ERR_PTR(-ENOMEM);
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parent_name = __clk_get_name(parent_clk);
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init.name = clk_name;
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init.ops = &meson_clk_no_ops;
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init.flags = flags;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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hw->init = &init;
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ret = devm_clk_hw_register(dev, hw);
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return ret ? ERR_PTR(ret) : hw;
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}
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EXPORT_SYMBOL_GPL(meson_clk_hw_register_input);
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MODULE_DESCRIPTION("Amlogic clock input helper");
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MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
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MODULE_LICENSE("GPL v2");
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@ -1,19 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 BayLibre, SAS.
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*/
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#ifndef __MESON_CLK_INPUT_H
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#define __MESON_CLK_INPUT_H
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#include <linux/clk-provider.h>
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struct device;
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struct clk_hw *meson_clk_hw_register_input(struct device *dev,
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const char *of_name,
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const char *clk_name,
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unsigned long flags);
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#endif /* __MESON_CLK_INPUT_H */
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