forked from Minki/linux
drm/nouveau/fifo/gk104-: use device info from top subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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56d06fa29e
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e93e198d46
@ -28,6 +28,7 @@
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#include <core/enum.h>
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#include <core/gpuobj.h>
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#include <subdev/bar.h>
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#include <subdev/top.h>
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#include <engine/sw.h>
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#include <nvif/class.h>
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@ -665,7 +666,9 @@ gk104_fifo_oneinit(struct nvkm_fifo *base)
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struct gk104_fifo *fifo = gk104_fifo(base);
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struct nvkm_subdev *subdev = &fifo->base.engine.subdev;
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struct nvkm_device *device = subdev->device;
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int ret, i;
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struct nvkm_top *top = device->top;
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int engn, runl, pbid, ret, i, j;
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enum nvkm_devidx engidx;
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u32 *map;
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/* Determine number of PBDMAs by checking valid enable bits. */
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@ -680,87 +683,27 @@ gk104_fifo_oneinit(struct nvkm_fifo *base)
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for (i = 0; i < fifo->pbdma_nr; i++)
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map[i] = nvkm_rd32(device, 0x002390 + (i * 0x04));
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/* Read device topology from HW. */
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for (i = 0; i < 64; i++) {
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int type = -1, pbid = -1, engidx = -1;
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int engn = -1, runl = -1, intr = -1, mcen = -1;
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int fault = -1, j;
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u32 data, addr = 0;
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do {
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data = nvkm_rd32(device, 0x022700 + (i * 0x04));
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nvkm_trace(subdev, "%02x: %08x\n", i, data);
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switch (data & 0x00000003) {
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case 0x00000000: /* NOT_VALID */
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continue;
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case 0x00000001: /* DATA */
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addr = (data & 0x00fff000);
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fault = (data & 0x000000f8) >> 3;
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break;
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case 0x00000002: /* ENUM */
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if (data & 0x00000020)
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engn = (data & 0x3c000000) >> 26;
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if (data & 0x00000010)
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runl = (data & 0x01e00000) >> 21;
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if (data & 0x00000008)
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intr = (data & 0x000f8000) >> 15;
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if (data & 0x00000004)
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mcen = (data & 0x00003e00) >> 9;
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break;
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case 0x00000003: /* ENGINE_TYPE */
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type = (data & 0x7ffffffc) >> 2;
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break;
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}
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} while ((data & 0x80000000) && ++i < 64);
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if (!data)
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continue;
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/* Determine runlist configuration from topology device info. */
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i = 0;
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while ((int)(engidx = nvkm_top_engine(top, i++, &runl, &engn)) >= 0) {
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/* Determine which PBDMA handles requests for this engine. */
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for (j = 0; runl >= 0 && j < fifo->pbdma_nr; j++) {
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for (j = 0, pbid = -1; j < fifo->pbdma_nr; j++) {
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if (map[j] & (1 << runl)) {
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pbid = j;
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break;
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}
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}
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/* Translate engine type to NVKM engine identifier. */
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switch (type) {
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case 0x00000000: engidx = NVKM_ENGINE_GR; break;
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case 0x00000001: engidx = NVKM_ENGINE_CE0; break;
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case 0x00000002: engidx = NVKM_ENGINE_CE1; break;
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case 0x00000003: engidx = NVKM_ENGINE_CE2; break;
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case 0x00000008: engidx = NVKM_ENGINE_MSPDEC; break;
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case 0x00000009: engidx = NVKM_ENGINE_MSPPP; break;
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case 0x0000000a: engidx = NVKM_ENGINE_MSVLD; break;
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case 0x0000000b: engidx = NVKM_ENGINE_MSENC; break;
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case 0x0000000c: engidx = NVKM_ENGINE_VIC; break;
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case 0x0000000d: engidx = NVKM_ENGINE_SEC; break;
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case 0x0000000e: engidx = NVKM_ENGINE_NVENC0; break;
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case 0x0000000f: engidx = NVKM_ENGINE_NVENC1; break;
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case 0x00000010: engidx = NVKM_ENGINE_NVDEC; break;
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break;
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default:
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break;
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}
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nvkm_debug(subdev, "engine %2d: runlist %2d pbdma %2d\n",
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engn, runl, pbid);
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nvkm_debug(subdev, "%02x (%8s): engine %2d runlist %2d "
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"pbdma %2d intr %2d reset %2d "
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"fault %2d addr %06x\n", type,
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engidx < 0 ? NULL : nvkm_subdev_name[engidx],
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engn, runl, pbid, intr, mcen, fault, addr);
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/* Mark the engine as supported if everything checks out. */
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if (engn >= 0 && runl >= 0) {
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fifo->engine[engn].engine = engidx < 0 ? NULL :
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nvkm_device_engine(device, engidx);
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fifo->engine[engn].engine = nvkm_device_engine(device, engidx);
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fifo->engine[engn].runl = runl;
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fifo->engine[engn].pbid = pbid;
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fifo->engine_nr = max(fifo->engine_nr, engn + 1);
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fifo->runlist[runl].engm |= 1 << engn;
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fifo->runlist_nr = max(fifo->runlist_nr, runl + 1);
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}
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}
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kfree(map);
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