forked from Minki/linux
[SCSI] hpsa: dial down lockup detection during firmware flash
Dial back the aggressiveness of the controller lockup detection thread. Currently it will declare the controller to be locked up if it goes for 10 seconds with no interrupts and no change in the heartbeat register. Dial back this to 30 seconds with no heartbeat change, and also snoop the ioctl path and if a firmware flash command is detected, dial it back further to 4 minutes until the firmware flash command completes. The reason for this is that during the firmware flash operation, the controller apparently doesn't update the heartbeat register as frequently as it is supposed to, and we can get a false positive. Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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21334ea908
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e85c597469
@ -569,12 +569,42 @@ static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
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}
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}
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static int is_firmware_flash_cmd(u8 *cdb)
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{
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return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
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}
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/*
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* During firmware flash, the heartbeat register may not update as frequently
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* as it should. So we dial down lockup detection during firmware flash. and
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* dial it back up when firmware flash completes.
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*/
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#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
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#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
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static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
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struct CommandList *c)
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{
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if (!is_firmware_flash_cmd(c->Request.CDB))
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return;
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atomic_inc(&h->firmware_flash_in_progress);
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h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
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}
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static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
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struct CommandList *c)
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{
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if (is_firmware_flash_cmd(c->Request.CDB) &&
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atomic_dec_and_test(&h->firmware_flash_in_progress))
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h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
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}
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static void enqueue_cmd_and_start_io(struct ctlr_info *h,
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struct CommandList *c)
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{
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unsigned long flags;
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set_performant_mode(h, c);
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dial_down_lockup_detection_during_fw_flash(h, c);
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spin_lock_irqsave(&h->lock, flags);
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addQ(&h->reqQ, c);
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h->Qdepth++;
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@ -3385,6 +3415,7 @@ static inline void finish_cmd(struct CommandList *c)
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spin_lock_irqsave(&c->h->lock, flags);
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removeQ(c);
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spin_unlock_irqrestore(&c->h->lock, flags);
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dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
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if (likely(c->cmd_type == CMD_SCSI))
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complete_scsi_command(c);
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else if (c->cmd_type == CMD_IOCTL_PEND)
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@ -4562,9 +4593,6 @@ static void controller_lockup_detected(struct ctlr_info *h)
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spin_unlock_irqrestore(&h->lock, flags);
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}
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#define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
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#define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
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static void detect_controller_lockup(struct ctlr_info *h)
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{
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u64 now;
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@ -4575,7 +4603,7 @@ static void detect_controller_lockup(struct ctlr_info *h)
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now = get_jiffies_64();
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/* If we've received an interrupt recently, we're ok. */
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if (time_after64(h->last_intr_timestamp +
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(HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
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(h->heartbeat_sample_interval), now))
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return;
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/*
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@ -4584,7 +4612,7 @@ static void detect_controller_lockup(struct ctlr_info *h)
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* otherwise don't care about signals in this thread.
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*/
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if (time_after64(h->last_heartbeat_timestamp +
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(HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
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(h->heartbeat_sample_interval), now))
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return;
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/* If heartbeat has not changed since we last looked, we're not ok. */
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@ -4626,6 +4654,7 @@ static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
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{
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unsigned long flags;
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h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
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spin_lock_irqsave(&lockup_detector_lock, flags);
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list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
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spin_unlock_irqrestore(&lockup_detector_lock, flags);
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@ -129,6 +129,8 @@ struct ctlr_info {
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u64 last_intr_timestamp;
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u32 last_heartbeat;
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u64 last_heartbeat_timestamp;
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u32 heartbeat_sample_interval;
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atomic_t firmware_flash_in_progress;
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u32 lockup_detected;
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struct list_head lockup_list;
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/* Address of h->q[x] is passed to intr handler to know which queue */
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@ -186,6 +186,7 @@ struct SenseSubsystem_info {
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#define BMIC_WRITE 0x27
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#define BMIC_CACHE_FLUSH 0xc2
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#define HPSA_CACHE_FLUSH 0x01 /* C2 was already being used by HPSA */
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#define BMIC_FLASH_FIRMWARE 0xF7
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/* Command List Structure */
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union SCSI3Addr {
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