i.MX SoC update for 5.11:

- Add revision detection support for i.MX7ULP revision 2.2.
 - Add a little document for i.MX7ULP B2 silicon version.
 - Add serial number support for i.MX23, i.MX28 SoCs through soc_device.
 - Improve the identifying of i.MX6QP SoCs.
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Merge tag 'imx-soc-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc

i.MX SoC update for 5.11:

- Add revision detection support for i.MX7ULP revision 2.2.
- Add a little document for i.MX7ULP B2 silicon version.
- Add serial number support for i.MX23, i.MX28 SoCs through soc_device.
- Improve the identifying of i.MX6QP SoCs.

* tag 'imx-soc-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: mxs: Add serial number support for i.MX23, i.MX28 SoCs
  ARM: imx: mach-imx6q: correctly identify i.MX6QP SoCs
  ARM: imx: imx7ulp: Add a comment explaining the B2 silicon version
  ARM: imx: Add revision support for i.MX7ULP revision 2.2

Link: https://lore.kernel.org/r/20201202142717.9262-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-12-09 17:27:34 +01:00
commit e7e499ee8a
3 changed files with 30 additions and 2 deletions

View File

@ -245,8 +245,13 @@ static void __init imx6q_axi_init(void)
static void __init imx6q_init_machine(void)
{
if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0)
imx_print_silicon_rev("i.MX6QP", IMX_CHIP_REVISION_1_0);
if (cpu_is_imx6q() && imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0)
/*
* SoCs that identify as i.MX6Q >= rev 2.0 are really i.MX6QP.
* Quirk: i.MX6QP revision = i.MX6Q revision - (1, 0),
* e.g. i.MX6QP rev 1.1 identifies as i.MX6Q rev 2.1.
*/
imx_print_silicon_rev("i.MX6QP", imx_get_soc_revision() - 0x10);
else
imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
imx_get_soc_revision());

View File

@ -37,6 +37,7 @@ static void __init imx7ulp_set_revision(void)
* bit[31:28] of JTAG_ID register defines revision as below from B0:
* 0001 B0
* 0010 B1
* 0011 B2
*/
switch (revision >> 28) {
case 1:
@ -45,6 +46,9 @@ static void __init imx7ulp_set_revision(void)
case 2:
imx_set_soc_revision(IMX_CHIP_REVISION_2_1);
break;
case 3:
imx_set_soc_revision(IMX_CHIP_REVISION_2_2);
break;
default:
imx_set_soc_revision(IMX_CHIP_REVISION_1_0);
break;

View File

@ -22,6 +22,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/system_info.h>
#include <asm/system_misc.h>
#include "pm.h"
@ -51,6 +52,9 @@
#define MXS_CLR_ADDR 0x8
#define MXS_TOG_ADDR 0xc
#define HW_OCOTP_OPS2 19 /* offset 0x150 */
#define HW_OCOTP_OPS3 20 /* offset 0x160 */
static u32 chipid;
static u32 socid;
@ -379,6 +383,8 @@ static void __init mxs_machine_init(void)
struct device *parent;
struct soc_device *soc_dev;
struct soc_device_attribute *soc_dev_attr;
u64 soc_uid = 0;
const u32 *ocotp = mxs_get_ocotp();
int ret;
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
@ -394,8 +400,21 @@ static void __init mxs_machine_init(void)
soc_dev_attr->soc_id = mxs_get_soc_id();
soc_dev_attr->revision = mxs_get_revision();
if (socid == HW_DIGCTL_CHIPID_MX23) {
soc_uid = system_serial_low = ocotp[HW_OCOTP_OPS3];
} else if (socid == HW_DIGCTL_CHIPID_MX28) {
soc_uid = system_serial_high = ocotp[HW_OCOTP_OPS2];
soc_uid <<= 32;
system_serial_low = ocotp[HW_OCOTP_OPS3];
soc_uid |= system_serial_low;
}
if (soc_uid)
soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
soc_dev = soc_device_register(soc_dev_attr);
if (IS_ERR(soc_dev)) {
kfree(soc_dev_attr->serial_number);
kfree(soc_dev_attr->revision);
kfree(soc_dev_attr);
return;