i.MX SoC update for 5.11:
- Add revision detection support for i.MX7ULP revision 2.2. - Add a little document for i.MX7ULP B2 silicon version. - Add serial number support for i.MX23, i.MX28 SoCs through soc_device. - Improve the identifying of i.MX6QP SoCs. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl/HjyIUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM6aaAf+Pl6Mo1Jf9EwEG5gdJ+ELXODNIae7 CLMcg2DPTdZGTrAFdAjZ0uKmZbQNshvDr3m4SQNSGN/7IYiRjayR3jFg20mbVDjT CvQYGHrNT8g6FEjcM50J0yBvBRgC7PvX1OXj9WZ8DXqOKw+qwZwFDoIlbk7Q/k+I POYpTbJw79vzSrgn2yTQIgBx4UczC5ZR1SldGCZ5M2PzjfKEOeEJwGHEg+hrhoOB kBTgqprJJyY4FX1NiGvbnobfVKqYhykxw6CgoI8GNsG0O58xU2TdZw2T9t/ZZcgw T+sV50RUXvVmyBSl3s5VDDBtHaM2RGBj8aPMPTQhWjUliKlka4KslWNp/A== =PpkS -----END PGP SIGNATURE----- Merge tag 'imx-soc-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC update for 5.11: - Add revision detection support for i.MX7ULP revision 2.2. - Add a little document for i.MX7ULP B2 silicon version. - Add serial number support for i.MX23, i.MX28 SoCs through soc_device. - Improve the identifying of i.MX6QP SoCs. * tag 'imx-soc-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: mxs: Add serial number support for i.MX23, i.MX28 SoCs ARM: imx: mach-imx6q: correctly identify i.MX6QP SoCs ARM: imx: imx7ulp: Add a comment explaining the B2 silicon version ARM: imx: Add revision support for i.MX7ULP revision 2.2 Link: https://lore.kernel.org/r/20201202142717.9262-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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commit
e7e499ee8a
@ -245,8 +245,13 @@ static void __init imx6q_axi_init(void)
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static void __init imx6q_init_machine(void)
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{
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if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0)
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imx_print_silicon_rev("i.MX6QP", IMX_CHIP_REVISION_1_0);
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if (cpu_is_imx6q() && imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0)
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/*
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* SoCs that identify as i.MX6Q >= rev 2.0 are really i.MX6QP.
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* Quirk: i.MX6QP revision = i.MX6Q revision - (1, 0),
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* e.g. i.MX6QP rev 1.1 identifies as i.MX6Q rev 2.1.
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*/
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imx_print_silicon_rev("i.MX6QP", imx_get_soc_revision() - 0x10);
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else
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imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
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imx_get_soc_revision());
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@ -37,6 +37,7 @@ static void __init imx7ulp_set_revision(void)
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* bit[31:28] of JTAG_ID register defines revision as below from B0:
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* 0001 B0
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* 0010 B1
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* 0011 B2
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*/
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switch (revision >> 28) {
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case 1:
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@ -45,6 +46,9 @@ static void __init imx7ulp_set_revision(void)
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case 2:
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imx_set_soc_revision(IMX_CHIP_REVISION_2_1);
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break;
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case 3:
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imx_set_soc_revision(IMX_CHIP_REVISION_2_2);
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break;
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default:
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imx_set_soc_revision(IMX_CHIP_REVISION_1_0);
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break;
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@ -22,6 +22,7 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <asm/system_info.h>
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#include <asm/system_misc.h>
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#include "pm.h"
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@ -51,6 +52,9 @@
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#define MXS_CLR_ADDR 0x8
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#define MXS_TOG_ADDR 0xc
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#define HW_OCOTP_OPS2 19 /* offset 0x150 */
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#define HW_OCOTP_OPS3 20 /* offset 0x160 */
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static u32 chipid;
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static u32 socid;
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@ -379,6 +383,8 @@ static void __init mxs_machine_init(void)
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struct device *parent;
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struct soc_device *soc_dev;
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struct soc_device_attribute *soc_dev_attr;
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u64 soc_uid = 0;
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const u32 *ocotp = mxs_get_ocotp();
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int ret;
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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@ -394,8 +400,21 @@ static void __init mxs_machine_init(void)
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soc_dev_attr->soc_id = mxs_get_soc_id();
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soc_dev_attr->revision = mxs_get_revision();
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if (socid == HW_DIGCTL_CHIPID_MX23) {
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soc_uid = system_serial_low = ocotp[HW_OCOTP_OPS3];
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} else if (socid == HW_DIGCTL_CHIPID_MX28) {
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soc_uid = system_serial_high = ocotp[HW_OCOTP_OPS2];
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soc_uid <<= 32;
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system_serial_low = ocotp[HW_OCOTP_OPS3];
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soc_uid |= system_serial_low;
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}
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if (soc_uid)
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soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr->serial_number);
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kfree(soc_dev_attr->revision);
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kfree(soc_dev_attr);
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return;
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