forked from Minki/linux
powerpc/mpic: Save computed phys_addr for board-specific code
The MPIC code can already perform an automatic OF address translation step as part of mpic_alloc(), but several boards need to use that base address when they perform mpic_assign_isu(). The easiest solution is to save the computed physical address into the "struct mpic" for later use by the board code. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -293,6 +293,9 @@ struct mpic
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/* Register access method */
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enum mpic_reg_type reg_type;
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/* The physical base address of the MPIC */
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phys_addr_t paddr;
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/* The various ioremap'ed bases */
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struct mpic_reg_bank gregs;
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struct mpic_reg_bank tmregs;
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@ -148,7 +148,6 @@ static void __init holly_setup_arch(void)
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static void __init holly_init_IRQ(void)
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{
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struct mpic *mpic;
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phys_addr_t mpic_paddr = 0;
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struct device_node *tsi_pic;
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#ifdef CONFIG_PCI
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unsigned int cascade_pci_irq;
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@ -157,20 +156,12 @@ static void __init holly_init_IRQ(void)
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#endif
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tsi_pic = of_find_node_by_type(NULL, "open-pic");
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if (tsi_pic) {
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unsigned int size;
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const void *prop = of_get_property(tsi_pic, "reg", &size);
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mpic_paddr = of_translate_address(tsi_pic, prop);
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}
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if (mpic_paddr == 0) {
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if (!tsi_pic) {
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printk(KERN_ERR "%s: No tsi108 PIC found !\n", __func__);
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return;
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}
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pr_debug("%s: tsi108 pic phys_addr = 0x%x\n", __func__, (u32) mpic_paddr);
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mpic = mpic_alloc(tsi_pic, mpic_paddr,
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mpic = mpic_alloc(tsi_pic, 0,
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MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
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MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
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24,
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@ -179,7 +170,7 @@ static void __init holly_init_IRQ(void)
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BUG_ON(mpic == NULL);
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mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
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mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
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mpic_init(mpic);
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@ -82,28 +82,22 @@ static void __init linkstation_init_IRQ(void)
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{
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struct mpic *mpic;
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struct device_node *dnp;
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const u32 *prop;
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int size;
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phys_addr_t paddr;
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dnp = of_find_node_by_type(NULL, "open-pic");
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if (dnp == NULL)
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return;
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prop = of_get_property(dnp, "reg", &size);
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paddr = (phys_addr_t)of_translate_address(dnp, prop);
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mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32, " EPIC ");
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mpic = mpic_alloc(dnp, 0, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32, " EPIC ");
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BUG_ON(mpic == NULL);
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/* PCI IRQs */
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mpic_assign_isu(mpic, 0, paddr + 0x10200);
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mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);
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/* I2C */
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mpic_assign_isu(mpic, 1, paddr + 0x11000);
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mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);
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/* ttyS0, ttyS1 */
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mpic_assign_isu(mpic, 2, paddr + 0x11100);
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mpic_assign_isu(mpic, 2, mpic->paddr + 0x11100);
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mpic_init(mpic);
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}
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@ -102,7 +102,6 @@ static void __init mpc7448_hpc2_setup_arch(void)
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static void __init mpc7448_hpc2_init_IRQ(void)
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{
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struct mpic *mpic;
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phys_addr_t mpic_paddr = 0;
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struct device_node *tsi_pic;
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#ifdef CONFIG_PCI
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unsigned int cascade_pci_irq;
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@ -111,21 +110,12 @@ static void __init mpc7448_hpc2_init_IRQ(void)
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#endif
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tsi_pic = of_find_node_by_type(NULL, "open-pic");
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if (tsi_pic) {
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unsigned int size;
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const void *prop = of_get_property(tsi_pic, "reg", &size);
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mpic_paddr = of_translate_address(tsi_pic, prop);
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}
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if (mpic_paddr == 0) {
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if (!tsi_pic) {
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printk("%s: No tsi108 PIC found !\n", __func__);
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return;
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}
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DBG("%s: tsi108 pic phys_addr = 0x%x\n", __func__,
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(u32) mpic_paddr);
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mpic = mpic_alloc(tsi_pic, mpic_paddr,
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mpic = mpic_alloc(tsi_pic, 0,
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MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
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MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
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24,
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@ -134,7 +124,7 @@ static void __init mpc7448_hpc2_init_IRQ(void)
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BUG_ON(mpic == NULL);
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mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
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mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
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mpic_init(mpic);
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@ -84,22 +84,12 @@ static void __init storcenter_init_IRQ(void)
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{
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struct mpic *mpic;
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struct device_node *dnp;
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const void *prop;
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int size;
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phys_addr_t paddr;
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dnp = of_find_node_by_type(NULL, "open-pic");
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if (dnp == NULL)
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return;
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prop = of_get_property(dnp, "reg", &size);
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if (prop == NULL) {
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of_node_put(dnp);
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return;
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}
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paddr = (phys_addr_t)of_translate_address(dnp, prop);
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mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET,
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mpic = mpic_alloc(dnp, 0, MPIC_PRIMARY | MPIC_WANTS_RESET,
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16, 32, " OpenPIC ");
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of_node_put(dnp);
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@ -110,8 +100,8 @@ static void __init storcenter_init_IRQ(void)
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* 16 Serial Interrupts followed by 16 Internal Interrupts.
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* I2C is the second internal, so it is at 17, 0x11020.
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*/
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mpic_assign_isu(mpic, 0, paddr + 0x10200);
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mpic_assign_isu(mpic, 1, paddr + 0x11000);
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mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);
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mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);
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mpic_init(mpic);
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}
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@ -234,7 +234,7 @@ static __init void pas_init_IRQ(void)
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mpic_flags, 0, 0, "PASEMI-OPIC");
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BUG_ON(!mpic);
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mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
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mpic_assign_isu(mpic, 0, mpic->paddr + 0x10000);
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mpic_init(mpic);
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/* The NMI/MCK source needs to be prio 15 */
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if (nmiprop) {
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@ -1164,6 +1164,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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return NULL;
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mpic->name = name;
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mpic->paddr = phys_addr;
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mpic->hc_irq = mpic_irq_chip;
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mpic->hc_irq.name = name;
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@ -1250,8 +1251,8 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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#endif
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/* Map the global registers */
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mpic_map(mpic, node, phys_addr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
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mpic_map(mpic, node, phys_addr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
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mpic_map(mpic, node, mpic->paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
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mpic_map(mpic, node, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
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/* Reset */
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@ -1306,7 +1307,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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for_each_possible_cpu(i) {
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unsigned int cpu = get_hard_smp_processor_id(i);
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mpic_map(mpic, node, phys_addr, &mpic->cpuregs[cpu],
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mpic_map(mpic, node, mpic->paddr, &mpic->cpuregs[cpu],
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MPIC_INFO(CPU_BASE) + cpu * MPIC_INFO(CPU_STRIDE),
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0x1000);
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}
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@ -1314,7 +1315,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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/* Initialize main ISU if none provided */
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if (mpic->isu_size == 0) {
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mpic->isu_size = mpic->num_sources;
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mpic_map(mpic, node, phys_addr, &mpic->isus[0],
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mpic_map(mpic, node, mpic->paddr, &mpic->isus[0],
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MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
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}
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mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
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@ -1346,7 +1347,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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}
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printk(KERN_INFO "mpic: Setting up MPIC \"%s\" version %s at %llx,"
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" max %d CPUs\n",
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name, vers, (unsigned long long)phys_addr, num_possible_cpus());
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name, vers, (unsigned long long)mpic->paddr, num_possible_cpus());
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printk(KERN_INFO "mpic: ISU size: %d, shift: %d, mask: %x\n",
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mpic->isu_size, mpic->isu_shift, mpic->isu_mask);
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