forked from Minki/linux
KVM: x86: Refactor cpuid_mask() to auto-retrieve the register
Use the recently introduced cpuid_entry_get_reg() to automatically get the appropriate register when masking a CPUID entry. No functional change intended. Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -254,12 +254,6 @@ out:
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return r;
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}
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static __always_inline void cpuid_mask(u32 *word, int wordnum)
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{
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reverse_cpuid_check(wordnum);
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*word &= boot_cpu_data.x86_capability[wordnum];
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}
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struct kvm_cpuid_array {
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struct kvm_cpuid_entry2 *entries;
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const int maxnent;
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@ -373,13 +367,13 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry)
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case 0:
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entry->eax = min(entry->eax, 1u);
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entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
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cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
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cpuid_entry_mask(entry, CPUID_7_0_EBX);
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/* TSC_ADJUST is emulated */
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cpuid_entry_set(entry, X86_FEATURE_TSC_ADJUST);
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entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
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f_la57 = cpuid_entry_get(entry, X86_FEATURE_LA57);
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cpuid_mask(&entry->ecx, CPUID_7_ECX);
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cpuid_entry_mask(entry, CPUID_7_ECX);
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/* Set LA57 based on hardware capability. */
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entry->ecx |= f_la57;
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entry->ecx |= f_umip;
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@ -389,7 +383,7 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry)
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cpuid_entry_clear(entry, X86_FEATURE_PKU);
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entry->edx &= kvm_cpuid_7_0_edx_x86_features;
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cpuid_mask(&entry->edx, CPUID_7_EDX);
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cpuid_entry_mask(entry, CPUID_7_EDX);
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if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
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cpuid_entry_set(entry, X86_FEATURE_SPEC_CTRL);
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if (boot_cpu_has(X86_FEATURE_STIBP))
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@ -507,9 +501,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
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break;
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case 1:
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entry->edx &= kvm_cpuid_1_edx_x86_features;
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cpuid_mask(&entry->edx, CPUID_1_EDX);
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cpuid_entry_mask(entry, CPUID_1_EDX);
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entry->ecx &= kvm_cpuid_1_ecx_x86_features;
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cpuid_mask(&entry->ecx, CPUID_1_ECX);
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cpuid_entry_mask(entry, CPUID_1_ECX);
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/* we support x2apic emulation even if host does not support
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* it since we emulate x2apic in software */
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cpuid_entry_set(entry, X86_FEATURE_X2APIC);
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@ -619,7 +613,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
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goto out;
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entry->eax &= kvm_cpuid_D_1_eax_x86_features;
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cpuid_mask(&entry->eax, CPUID_D_1_EAX);
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cpuid_entry_mask(entry, CPUID_D_1_EAX);
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if (entry->eax & (F(XSAVES)|F(XSAVEC)))
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entry->ebx = xstate_required_size(supported_xcr0, true);
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else
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@ -699,9 +693,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
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break;
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case 0x80000001:
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entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
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cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
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cpuid_entry_mask(entry, CPUID_8000_0001_EDX);
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entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
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cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
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cpuid_entry_mask(entry, CPUID_8000_0001_ECX);
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break;
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case 0x80000007: /* Advanced power management */
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/* invariant TSC is CPUID.80000007H:EDX[8] */
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@ -720,7 +714,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
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entry->eax = g_phys_as | (virt_as << 8);
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entry->edx = 0;
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entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
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cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
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cpuid_entry_mask(entry, CPUID_8000_0008_EBX);
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/*
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* AMD has separate bits for each SPEC_CTRL bit.
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* arch/x86/kernel/cpu/bugs.c is kind enough to
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@ -763,7 +757,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
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break;
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case 0xC0000001:
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entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
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cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
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cpuid_entry_mask(entry, CPUID_C000_0001_EDX);
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break;
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case 3: /* Processor serial number */
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case 5: /* MONITOR/MWAIT */
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@ -167,6 +167,14 @@ static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry,
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*reg &= ~__feature_bit(x86_feature);
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}
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static __always_inline void cpuid_entry_mask(struct kvm_cpuid_entry2 *entry,
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enum cpuid_leafs leaf)
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{
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u32 *reg = cpuid_entry_get_reg(entry, leaf * 32);
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*reg &= boot_cpu_data.x86_capability[leaf];
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}
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static __always_inline u32 *guest_cpuid_get_register(struct kvm_vcpu *vcpu,
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unsigned int x86_feature)
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{
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