forked from Minki/linux
drm/amdgpu: Add copy_pte_num_dw member in amdgpu_vm_pte_funcs
Use it to replace the hard coded value in amdgpu_vm_bo_update_mapping(). Signed-off-by: Yong Zhao <yong.zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -294,10 +294,14 @@ struct amdgpu_buffer_funcs {
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/* provided by hw blocks that can write ptes, e.g., sdma */
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/* provided by hw blocks that can write ptes, e.g., sdma */
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struct amdgpu_vm_pte_funcs {
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struct amdgpu_vm_pte_funcs {
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/* number of dw to reserve per operation */
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unsigned copy_pte_num_dw;
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/* copy pte entries from GART */
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/* copy pte entries from GART */
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void (*copy_pte)(struct amdgpu_ib *ib,
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void (*copy_pte)(struct amdgpu_ib *ib,
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uint64_t pe, uint64_t src,
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uint64_t pe, uint64_t src,
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unsigned count);
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unsigned count);
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/* write pte one entry at a time with addr mapping */
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/* write pte one entry at a time with addr mapping */
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void (*write_pte)(struct amdgpu_ib *ib, uint64_t pe,
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void (*write_pte)(struct amdgpu_ib *ib, uint64_t pe,
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uint64_t value, unsigned count,
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uint64_t value, unsigned count,
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@ -1597,7 +1597,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
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if (pages_addr) {
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if (pages_addr) {
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/* copy commands needed */
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/* copy commands needed */
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ndw += ncmds * 7;
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ndw += ncmds * adev->vm_manager.vm_pte_funcs->copy_pte_num_dw;
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/* and also PTEs */
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/* and also PTEs */
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ndw += nptes * 2;
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ndw += nptes * 2;
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@ -1387,7 +1387,9 @@ static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev)
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}
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}
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static const struct amdgpu_vm_pte_funcs cik_sdma_vm_pte_funcs = {
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static const struct amdgpu_vm_pte_funcs cik_sdma_vm_pte_funcs = {
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.copy_pte_num_dw = 7,
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.copy_pte = cik_sdma_vm_copy_pte,
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.copy_pte = cik_sdma_vm_copy_pte,
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.write_pte = cik_sdma_vm_write_pte,
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.write_pte = cik_sdma_vm_write_pte,
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.set_max_nums_pte_pde = 0x1fffff >> 3,
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.set_max_nums_pte_pde = 0x1fffff >> 3,
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@ -1324,7 +1324,9 @@ static void sdma_v2_4_set_buffer_funcs(struct amdgpu_device *adev)
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}
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}
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static const struct amdgpu_vm_pte_funcs sdma_v2_4_vm_pte_funcs = {
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static const struct amdgpu_vm_pte_funcs sdma_v2_4_vm_pte_funcs = {
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.copy_pte_num_dw = 7,
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.copy_pte = sdma_v2_4_vm_copy_pte,
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.copy_pte = sdma_v2_4_vm_copy_pte,
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.write_pte = sdma_v2_4_vm_write_pte,
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.write_pte = sdma_v2_4_vm_write_pte,
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.set_max_nums_pte_pde = 0x1fffff >> 3,
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.set_max_nums_pte_pde = 0x1fffff >> 3,
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@ -1748,7 +1748,9 @@ static void sdma_v3_0_set_buffer_funcs(struct amdgpu_device *adev)
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}
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}
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static const struct amdgpu_vm_pte_funcs sdma_v3_0_vm_pte_funcs = {
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static const struct amdgpu_vm_pte_funcs sdma_v3_0_vm_pte_funcs = {
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.copy_pte_num_dw = 7,
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.copy_pte = sdma_v3_0_vm_copy_pte,
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.copy_pte = sdma_v3_0_vm_copy_pte,
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.write_pte = sdma_v3_0_vm_write_pte,
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.write_pte = sdma_v3_0_vm_write_pte,
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/* not 0x3fffff due to HW limitation */
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/* not 0x3fffff due to HW limitation */
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@ -1714,7 +1714,9 @@ static void sdma_v4_0_set_buffer_funcs(struct amdgpu_device *adev)
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}
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}
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static const struct amdgpu_vm_pte_funcs sdma_v4_0_vm_pte_funcs = {
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static const struct amdgpu_vm_pte_funcs sdma_v4_0_vm_pte_funcs = {
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.copy_pte_num_dw = 7,
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.copy_pte = sdma_v4_0_vm_copy_pte,
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.copy_pte = sdma_v4_0_vm_copy_pte,
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.write_pte = sdma_v4_0_vm_write_pte,
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.write_pte = sdma_v4_0_vm_write_pte,
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.set_max_nums_pte_pde = 0x400000 >> 3,
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.set_max_nums_pte_pde = 0x400000 >> 3,
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@ -887,7 +887,9 @@ static void si_dma_set_buffer_funcs(struct amdgpu_device *adev)
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}
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}
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static const struct amdgpu_vm_pte_funcs si_dma_vm_pte_funcs = {
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static const struct amdgpu_vm_pte_funcs si_dma_vm_pte_funcs = {
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.copy_pte_num_dw = 5,
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.copy_pte = si_dma_vm_copy_pte,
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.copy_pte = si_dma_vm_copy_pte,
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.write_pte = si_dma_vm_write_pte,
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.write_pte = si_dma_vm_write_pte,
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.set_max_nums_pte_pde = 0xffff8 >> 3,
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.set_max_nums_pte_pde = 0xffff8 >> 3,
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