forked from Minki/linux
drm/tegra: Add hardware cursor support
Enable hardware cursor support on Tegra124. Earlier generations support the hardware cursor to some degree as well, but not in a way that can be generically exposed. Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
parent
9910f5c455
commit
e687651bc1
@ -17,6 +17,7 @@
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struct tegra_dc_soc_info {
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bool supports_interlacing;
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bool supports_cursor;
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};
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struct tegra_plane {
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@ -477,6 +478,109 @@ void tegra_dc_disable_vblank(struct tegra_dc *dc)
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spin_unlock_irqrestore(&dc->lock, flags);
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}
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static int tegra_dc_cursor_set2(struct drm_crtc *crtc, struct drm_file *file,
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uint32_t handle, uint32_t width,
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uint32_t height, int32_t hot_x, int32_t hot_y)
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{
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unsigned long value = CURSOR_CLIP_DISPLAY;
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struct tegra_dc *dc = to_tegra_dc(crtc);
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struct drm_gem_object *gem;
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struct tegra_bo *bo = NULL;
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if (!dc->soc->supports_cursor)
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return -ENXIO;
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if (width != height)
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return -EINVAL;
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switch (width) {
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case 32:
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value |= CURSOR_SIZE_32x32;
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break;
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case 64:
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value |= CURSOR_SIZE_64x64;
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break;
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case 128:
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value |= CURSOR_SIZE_128x128;
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case 256:
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value |= CURSOR_SIZE_256x256;
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break;
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default:
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return -EINVAL;
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}
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if (handle) {
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gem = drm_gem_object_lookup(crtc->dev, file, handle);
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if (!gem)
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return -ENOENT;
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bo = to_tegra_bo(gem);
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}
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if (bo) {
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unsigned long addr = (bo->paddr & 0xfffffc00) >> 10;
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#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
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unsigned long high = (bo->paddr & 0xfffffffc) >> 32;
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#endif
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tegra_dc_writel(dc, value | addr, DC_DISP_CURSOR_START_ADDR);
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#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
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tegra_dc_writel(dc, high, DC_DISP_CURSOR_START_ADDR_HI);
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#endif
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value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);
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value |= CURSOR_ENABLE;
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tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);
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value = tegra_dc_readl(dc, DC_DISP_BLEND_CURSOR_CONTROL);
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value &= ~CURSOR_DST_BLEND_MASK;
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value &= ~CURSOR_SRC_BLEND_MASK;
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value |= CURSOR_MODE_NORMAL;
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value |= CURSOR_DST_BLEND_NEG_K1_TIMES_SRC;
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value |= CURSOR_SRC_BLEND_K1_TIMES_SRC;
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value |= CURSOR_ALPHA;
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tegra_dc_writel(dc, value, DC_DISP_BLEND_CURSOR_CONTROL);
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} else {
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value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);
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value &= ~CURSOR_ENABLE;
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tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);
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}
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tegra_dc_writel(dc, CURSOR_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
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tegra_dc_writel(dc, CURSOR_ACT_REQ, DC_CMD_STATE_CONTROL);
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tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
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tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
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return 0;
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}
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static int tegra_dc_cursor_move(struct drm_crtc *crtc, int x, int y)
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{
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struct tegra_dc *dc = to_tegra_dc(crtc);
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unsigned long value;
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if (!dc->soc->supports_cursor)
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return -ENXIO;
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value = ((y & 0x3fff) << 16) | (x & 0x3fff);
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tegra_dc_writel(dc, value, DC_DISP_CURSOR_POSITION);
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tegra_dc_writel(dc, CURSOR_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
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tegra_dc_writel(dc, CURSOR_ACT_REQ, DC_CMD_STATE_CONTROL);
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/* XXX: only required on generations earlier than Tegra124? */
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tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
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tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
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return 0;
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}
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static void tegra_dc_finish_page_flip(struct tegra_dc *dc)
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{
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struct drm_device *drm = dc->base.dev;
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@ -553,6 +657,8 @@ static void tegra_dc_destroy(struct drm_crtc *crtc)
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}
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static const struct drm_crtc_funcs tegra_crtc_funcs = {
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.cursor_set2 = tegra_dc_cursor_set2,
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.cursor_move = tegra_dc_cursor_move,
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.page_flip = tegra_dc_page_flip,
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.set_config = drm_crtc_helper_set_config,
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.destroy = tegra_dc_destroy,
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@ -999,6 +1105,8 @@ static int tegra_dc_show_regs(struct seq_file *s, void *data)
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DUMP_REG(DC_DISP_SD_BL_CONTROL);
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DUMP_REG(DC_DISP_SD_HW_K_VALUES);
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DUMP_REG(DC_DISP_SD_MAN_K_VALUES);
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DUMP_REG(DC_DISP_CURSOR_START_ADDR_HI);
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DUMP_REG(DC_DISP_BLEND_CURSOR_CONTROL);
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DUMP_REG(DC_WIN_WIN_OPTIONS);
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DUMP_REG(DC_WIN_BYTE_SWAP);
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DUMP_REG(DC_WIN_BUFFER_CONTROL);
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@ -1168,14 +1276,17 @@ static const struct host1x_client_ops dc_client_ops = {
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static const struct tegra_dc_soc_info tegra20_dc_soc_info = {
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.supports_interlacing = false,
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.supports_cursor = false,
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};
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static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
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.supports_interlacing = false,
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.supports_cursor = false,
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};
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static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
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.supports_interlacing = true,
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.supports_cursor = true,
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};
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static const struct of_device_id tegra_dc_of_match[] = {
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@ -67,10 +67,12 @@
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#define WIN_A_ACT_REQ (1 << 1)
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#define WIN_B_ACT_REQ (1 << 2)
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#define WIN_C_ACT_REQ (1 << 3)
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#define CURSOR_ACT_REQ (1 << 7)
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#define GENERAL_UPDATE (1 << 8)
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#define WIN_A_UPDATE (1 << 9)
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#define WIN_B_UPDATE (1 << 10)
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#define WIN_C_UPDATE (1 << 11)
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#define CURSOR_UPDATE (1 << 15)
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#define NC_HOST_TRIG (1 << 24)
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#define DC_CMD_DISPLAY_WINDOW_HEADER 0x042
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@ -116,9 +118,10 @@
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#define DC_DISP_DISP_SIGNAL_OPTIONS1 0x401
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#define DC_DISP_DISP_WIN_OPTIONS 0x402
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#define HDMI_ENABLE (1 << 30)
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#define DSI_ENABLE (1 << 29)
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#define SOR_ENABLE (1 << 25)
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#define HDMI_ENABLE (1 << 30)
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#define DSI_ENABLE (1 << 29)
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#define SOR_ENABLE (1 << 25)
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#define CURSOR_ENABLE (1 << 16)
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#define DC_DISP_DISP_MEM_HIGH_PRIORITY 0x403
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#define CURSOR_THRESHOLD(x) (((x) & 0x03) << 24)
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@ -266,6 +269,14 @@
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#define DC_DISP_CURSOR_BACKGROUND 0x43d
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#define DC_DISP_CURSOR_START_ADDR 0x43e
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#define CURSOR_CLIP_DISPLAY (0 << 28)
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#define CURSOR_CLIP_WIN_A (1 << 28)
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#define CURSOR_CLIP_WIN_B (2 << 28)
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#define CURSOR_CLIP_WIN_C (3 << 28)
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#define CURSOR_SIZE_32x32 (0 << 24)
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#define CURSOR_SIZE_64x64 (1 << 24)
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#define CURSOR_SIZE_128x128 (2 << 24)
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#define CURSOR_SIZE_256x256 (3 << 24)
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#define DC_DISP_CURSOR_START_ADDR_NS 0x43f
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#define DC_DISP_CURSOR_POSITION 0x440
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@ -302,6 +313,19 @@
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#define INTERLACE_START (1 << 1)
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#define INTERLACE_ENABLE (1 << 0)
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#define DC_DISP_CURSOR_START_ADDR_HI 0x4ec
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#define DC_DISP_BLEND_CURSOR_CONTROL 0x4f1
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#define CURSOR_MODE_LEGACY (0 << 24)
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#define CURSOR_MODE_NORMAL (1 << 24)
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#define CURSOR_DST_BLEND_ZERO (0 << 16)
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#define CURSOR_DST_BLEND_K1 (1 << 16)
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#define CURSOR_DST_BLEND_NEG_K1_TIMES_SRC (2 << 16)
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#define CURSOR_DST_BLEND_MASK (3 << 16)
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#define CURSOR_SRC_BLEND_K1 (0 << 8)
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#define CURSOR_SRC_BLEND_K1_TIMES_SRC (1 << 8)
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#define CURSOR_SRC_BLEND_MASK (3 << 8)
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#define CURSOR_ALPHA 0xff
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#define DC_WIN_CSC_YOF 0x611
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#define DC_WIN_CSC_KYRGB 0x612
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#define DC_WIN_CSC_KUR 0x613
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