forked from Minki/linux
b43: N-PHY: simplify conditions in RSSI offset scale function
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
This commit is contained in:
parent
6aa38725a5
commit
e5ab1fd7a5
@ -1214,7 +1214,7 @@ static void b43_nphy_run_samples(struct b43_wldev *dev, u16 samps, u16 loops,
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static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
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static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
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s8 offset, u8 core,
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s8 offset, u8 core,
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enum n_rail_type rail,
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enum n_rail_type rail,
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enum b43_nphy_rssi_type type)
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enum b43_nphy_rssi_type rssi_type)
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{
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{
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u16 tmp;
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u16 tmp;
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bool core1or5 = (core == 1) || (core == 5);
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bool core1or5 = (core == 1) || (core == 5);
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@ -1223,60 +1223,70 @@ static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
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offset = clamp_val(offset, -32, 31);
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offset = clamp_val(offset, -32, 31);
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tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
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tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_Z))
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switch (rssi_type) {
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
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case B43_NPHY_RSSI_Z:
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_Z))
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if (core1or5 && rail == N_RAIL_I)
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_Z))
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if (core1or5 && rail == N_RAIL_Q)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_Z))
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if (core2or5 && rail == N_RAIL_I)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
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if (core2or5 && rail == N_RAIL_Q)
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
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break;
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_X))
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case B43_NPHY_RSSI_X:
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
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if (core1or5 && rail == N_RAIL_I)
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
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if (core1or5 && rail == N_RAIL_Q)
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
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if (core2or5 && rail == N_RAIL_I)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_Y))
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if (core2or5 && rail == N_RAIL_Q)
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_Y))
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break;
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
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case B43_NPHY_RSSI_Y:
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_Y))
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if (core1or5 && rail == N_RAIL_I)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_Y))
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if (core1or5 && rail == N_RAIL_Q)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
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if (core2or5 && rail == N_RAIL_I)
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
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if (core2or5 && rail == N_RAIL_Q)
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
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break;
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_TBD))
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case B43_NPHY_RSSI_TBD:
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
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if (core1or5 && rail == N_RAIL_I)
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
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if (core1or5 && rail == N_RAIL_Q)
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_PWRDET))
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if (core2or5 && rail == N_RAIL_I)
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_PWRDET))
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if (core2or5 && rail == N_RAIL_Q)
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_PWRDET))
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break;
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
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case B43_NPHY_RSSI_PWRDET:
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_PWRDET))
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if (core1or5 && rail == N_RAIL_I)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
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if (core1or5 && rail == N_RAIL_Q)
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if (core1or5 && (type == B43_NPHY_RSSI_TSSI_I))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
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if (core2or5 && rail == N_RAIL_I)
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if (core2or5 && (type == B43_NPHY_RSSI_TSSI_I))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
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if (core2or5 && rail == N_RAIL_Q)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
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if (core1or5 && (type == B43_NPHY_RSSI_TSSI_Q))
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break;
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
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case B43_NPHY_RSSI_TSSI_I:
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if (core2or5 && (type == B43_NPHY_RSSI_TSSI_Q))
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if (core1or5)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
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if (core2or5)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
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break;
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case B43_NPHY_RSSI_TSSI_Q:
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if (core1or5)
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
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if (core2or5)
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
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break;
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}
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}
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}
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static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
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static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
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