ARM: mvebu: disable I/O coherency on non-SMP situations on Armada 370/375/38x/XP
Enabling the hardware I/O coherency on Armada 370, Armada 375, Armada
38x and Armada XP requires a certain number of conditions:
- On Armada 370, the cache policy must be set to write-allocate.
- On Armada 375, 38x and XP, the cache policy must be set to
write-allocate, the pages must be mapped with the shareable
attribute, and the SMP bit must be set
Currently, on Armada XP, when CONFIG_SMP is enabled, those conditions
are met. However, when Armada XP is used in a !CONFIG_SMP kernel, none
of these conditions are met. With Armada 370, the situation is worse:
since the processor is single core, regardless of whether CONFIG_SMP
or !CONFIG_SMP is used, the cache policy will be set to write-back by
the kernel and not write-allocate.
Since solving this problem turns out to be quite complicated, and we
don't want to let users with a mainline kernel known to have
infrequent but existing data corruptions, this commit proposes to
simply disable hardware I/O coherency in situations where it is known
not to work.
And basically, the is_smp() function of the kernel tells us whether it
is OK to enable hardware I/O coherency or not, so this commit slightly
refactors the coherency_type() function to return
COHERENCY_FABRIC_TYPE_NONE when is_smp() is false, or the appropriate
type of the coherency fabric in the other case.
Thanks to this, the I/O coherency fabric will no longer be used at all
in !CONFIG_SMP configurations. It will continue to be used in
CONFIG_SMP configurations on Armada XP, Armada 375 and Armada 38x
(which are multiple cores processors), but will no longer be used on
Armada 370 (which is a single core processor).
In the process, it simplifies the implementation of the
coherency_type() function, and adds a missing call to of_node_put().
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fixes: e60304f8cb
("arm: mvebu: Add hardware I/O Coherency support")
Cc: <stable@vger.kernel.org> # v3.8+
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1415871540-20302-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
parent
30cdef9710
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@ -361,25 +361,41 @@ static int coherency_type(void)
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{
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struct device_node *np;
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const struct of_device_id *match;
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int type;
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/*
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* The coherency fabric is needed:
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* - For coherency between processors on Armada XP, so only
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* when SMP is enabled.
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* - For coherency between the processor and I/O devices, but
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* this coherency requires many pre-requisites (write
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* allocate cache policy, shareable pages, SMP bit set) that
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* are only meant in SMP situations.
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*
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* Note that this means that on Armada 370, there is currently
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* no way to use hardware I/O coherency, because even when
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* CONFIG_SMP is enabled, is_smp() returns false due to the
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* Armada 370 being a single-core processor. To lift this
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* limitation, we would have to find a way to make the cache
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* policy set to write-allocate (on all Armada SoCs), and to
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* set the shareable attribute in page tables (on all Armada
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* SoCs except the Armada 370). Unfortunately, such decisions
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* are taken very early in the kernel boot process, at a point
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* where we don't know yet on which SoC we are running.
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*/
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if (!is_smp())
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return COHERENCY_FABRIC_TYPE_NONE;
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np = of_find_matching_node_and_match(NULL, of_coherency_table, &match);
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if (np) {
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int type = (int) match->data;
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if (!np)
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return COHERENCY_FABRIC_TYPE_NONE;
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/* Armada 370/XP coherency works in both UP and SMP */
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if (type == COHERENCY_FABRIC_TYPE_ARMADA_370_XP)
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return type;
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type = (int) match->data;
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/* Armada 375 coherency works only on SMP */
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else if (type == COHERENCY_FABRIC_TYPE_ARMADA_375 && is_smp())
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return type;
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of_node_put(np);
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/* Armada 380 coherency works only on SMP */
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else if (type == COHERENCY_FABRIC_TYPE_ARMADA_380 && is_smp())
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return type;
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}
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return COHERENCY_FABRIC_TYPE_NONE;
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return type;
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}
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int coherency_available(void)
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