From e52e4a3132a604c9f04a934bd6c2980f5293dc0a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 19 May 2021 10:15:35 +0200 Subject: [PATCH] gpu: drm: replace occurrences of invalid character MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are some places at drm that ended receiving a REPLACEMENT CHARACTER U+fffd ('�'), probably because of some bad charset conversion. Fix them by using what it seems to be the proper character. Acked-by: Randy Dunlap Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Alex Deucher Link: https://patchwork.freedesktop.org/patch/msgid/e606930c73029f16673849c57acac061dd923866.1621412009.git.mchehab+huawei@kernel.org --- drivers/gpu/drm/amd/include/atombios.h | 10 +++++----- drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 +- drivers/gpu/drm/i915/i915_gpu_error.h | 2 +- drivers/gpu/drm/r128/r128_drv.h | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h index 47eb84598b96..6a505d1b82a5 100644 --- a/drivers/gpu/drm/amd/include/atombios.h +++ b/drivers/gpu/drm/amd/include/atombios.h @@ -5178,11 +5178,11 @@ typedef struct _ATOM_LEAKAGE_VOLTAGE_OBJECT_V3 typedef struct _ATOM_SVID2_VOLTAGE_OBJECT_V3 { ATOM_VOLTAGE_OBJECT_HEADER_V3 sHeader; // voltage mode = VOLTAGE_OBJ_SVID2 -// 14:7 � PSI0_VID -// 6 � PSI0_EN -// 5 � PSI1 -// 4:2 � load line slope trim. -// 1:0 � offset trim, +// 14:7 - PSI0_VID +// 6 - PSI0_EN +// 5 - PSI1 +// 4:2 - load line slope trim. +// 1:0 - offset trim, USHORT usLoadLine_PSI; // GPU GPIO pin Id to SVID2 regulator VRHot pin. possible value 0~31. 0 means GPIO0, 31 means GPIO31 UCHAR ucSVDGpioId; //0~31 indicate GPIO0~31 diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h index 14e2ffb6c0e5..2694dbb9967e 100644 --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: MIT*/ /* - * Copyright � 2003-2018 Intel Corporation + * Copyright © 2003-2018 Intel Corporation */ #ifndef _INTEL_GPU_COMMANDS_H_ diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index 16bc42de4b84..4df24c737e13 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: MIT * - * Copyright � 2008-2018 Intel Corporation + * Copyright © 2008-2018 Intel Corporation */ #ifndef _I915_GPU_ERROR_H_ diff --git a/drivers/gpu/drm/r128/r128_drv.h b/drivers/gpu/drm/r128/r128_drv.h index 8b256123cf2b..2e1bc01aa5c9 100644 --- a/drivers/gpu/drm/r128/r128_drv.h +++ b/drivers/gpu/drm/r128/r128_drv.h @@ -29,7 +29,7 @@ * Rickard E. (Rik) Faith * Kevin E. Martin * Gareth Hughes - * Michel D�zer + * Michel Dänzer */ #ifndef __R128_DRV_H__