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powerpc/virtex: Add Xilinx ML510 reference design support

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Signed-off-by: Roderick Colenbrander <thunderbird2k@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Roderick Colenbrander 2009-06-06 10:15:24 -06:00 committed by Grant Likely
parent 1745fbc744
commit e52ba9c541
4 changed files with 47 additions and 1 deletions
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13
arch/powerpc/platforms/44x/Kconfig
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@ -156,7 +156,7 @@ config YOSEMITE
# This option enables support for the IBM PPC440GX evaluation board.
config XILINX_VIRTEX440_GENERIC_BOARD
bool "Generic Xilinx Virtex 440 board"
bool "Generic Xilinx Virtex 5 FXT board support"
depends on 44x
default n
select XILINX_VIRTEX_5_FXT
@ -171,6 +171,17 @@ config XILINX_VIRTEX440_GENERIC_BOARD
Most Virtex 5 designs should use this unless it needs to do some
special configuration at board probe time.
config XILINX_ML510
bool "Xilinx ML510 extra support"
depends on XILINX_VIRTEX440_GENERIC_BOARD
select PPC_PCI_CHOICE
select XILINX_PCI if PCI
select PPC_INDIRECT_PCI if PCI
select PPC_I8259 if PCI
help
This option enables extra support for features on the Xilinx ML510
board. The ML510 has a PCI bus with ALI south bridge.
config PPC44x_SIMPLE
bool "Simple PowerPC 44x board support"
depends on 44x

1
arch/powerpc/platforms/44x/Makefile
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@ -4,3 +4,4 @@ obj-$(CONFIG_EBONY) += ebony.o
obj-$(CONFIG_SAM440EP) += sam440ep.o
obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o

29
arch/powerpc/platforms/44x/virtex_ml510.c Normal file
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@ -0,0 +1,29 @@
#include <asm/i8259.h>
#include <linux/pci.h>
#include "44x.h"
/**
* ml510_ail_quirk
*/
static void __devinit ml510_ali_quirk(struct pci_dev *dev)
{
/* Enable the IDE controller */
pci_write_config_byte(dev, 0x58, 0x4c);
/* Assign irq 14 to the primary ide channel */
pci_write_config_byte(dev, 0x44, 0x0d);
/* Assign irq 15 to the secondary ide channel */
pci_write_config_byte(dev, 0x75, 0x0f);
/* Set the ide controller in native mode */
pci_write_config_byte(dev, 0x09, 0xff);
/* INTB = disabled, INTA = disabled */
pci_write_config_byte(dev, 0x48, 0x00);
/* INTD = disabled, INTC = disabled */
pci_write_config_byte(dev, 0x4a, 0x00);
/* Audio = INT7, Modem = disabled. */
pci_write_config_byte(dev, 0x4b, 0x60);
/* USB = INT7 */
pci_write_config_byte(dev, 0x74, 0x06);
}
DECLARE_PCI_FIXUP_EARLY(0x10b9, 0x1533, ml510_ali_quirk);

5
arch/powerpc/sysdev/xilinx_intc.c
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@ -257,6 +257,11 @@ static void __init xilinx_i8259_setup_cascade(void)
i8259_init(cascade_node, 0);
set_irq_chained_handler(cascade_irq, xilinx_i8259_cascade);
/* Program irq 7 (usb/audio), 14/15 (ide) to level sensitive */
/* This looks like a dirty hack to me --gcl */
outb(0xc0, 0x4d0);
outb(0xc0, 0x4d1);
out:
of_node_put(cascade_node);
}