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drm/amd/display: Making hubp1_program_surface_config public

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Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yue Hin Lau 2017-09-28 16:09:56 -04:00 committed by Alex Deucher
parent 66bfd4fd17
commit e4b3b5ccd9
2 changed files with 11 additions and 1 deletions
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3
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c
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@ -407,7 +407,7 @@ void hubp1_dcc_control(struct mem_input *mem_input, bool enable,
PRIMARY_SURFACE_DCC_IND_64B_BLK, dcc_ind_64b_blk); PRIMARY_SURFACE_DCC_IND_64B_BLK, dcc_ind_64b_blk);
} }
static void hubp1_program_surface_config( void hubp1_program_surface_config(
struct mem_input *mem_input, struct mem_input *mem_input,
enum surface_pixel_format format, enum surface_pixel_format format,
union dc_tiling_info *tiling_info, union dc_tiling_info *tiling_info,
@ -970,3 +970,4 @@ void dcn10_mem_input_construct(
mi->base.mpcc_id = 0xf; mi->base.mpcc_id = 0xf;
} }

9
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.h
View File

@ -591,6 +591,15 @@ struct dcn10_mem_input {
const struct dcn_mi_mask *mi_mask; const struct dcn_mi_mask *mi_mask;
}; };
void hubp1_program_surface_config(
struct mem_input *mem_input,
enum surface_pixel_format format,
union dc_tiling_info *tiling_info,
union plane_size *plane_size,
enum dc_rotation_angle rotation,
struct dc_plane_dcc_param *dcc,
bool horizontal_mirror);
void hubp1_program_deadline( void hubp1_program_deadline(
struct mem_input *mem_input, struct mem_input *mem_input,
struct _vcs_dpi_display_dlg_regs_st *dlg_attr, struct _vcs_dpi_display_dlg_regs_st *dlg_attr,