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bus: mhi: pci_generic: No-Op for device_wake operations

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The wake_db register presence is highly speculative and can fuze MHI
devices. Indeed, currently the wake_db register address is defined at
entry 127 of the 'Channel doorbell array', thus writing to this address
is equivalent to ringing the doorbell for channel 127, causing trouble
with some devics (e.g. SDX24 based modems) that get an unexpected
channel 127 doorbell interrupt.

This change fixes that issue by setting wake get/put as no-op for
pci_generic devices. The wake device sideband mechanism seems really
specific to each device, and is AFAIK not defined by the MHI spec.

It also removes zeroing initialization of wake_db register during MMIO
initialization, the register being set via wake_get/put accessors few
cycles later during M0 transition.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/1614971808-22156-4-git-send-email-loic.poulain@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit is contained in:
Loic Poulain 2021-03-05 20:16:46 +01:00 committed by Manivannan Sadhasivam
parent 59d05b7172
commit e3e5e6508f
2 changed files with 18 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/bus/mhi/core/init.c
View File

@ -508,8 +508,6 @@ int mhi_init_mmio(struct mhi_controller *mhi_cntrl)
/* Setup wake db */ /* Setup wake db */
mhi_cntrl->wake_db = base + val + (8 * MHI_DEV_WAKE_DB); mhi_cntrl->wake_db = base + val + (8 * MHI_DEV_WAKE_DB);
mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 4, 0);
mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 0, 0);
mhi_cntrl->wake_set = false; mhi_cntrl->wake_set = false;
/* Setup channel db address for each channel in tre_ring */ /* Setup channel db address for each channel in tre_ring */

18
drivers/bus/mhi/pci_generic.c
View File

@ -313,6 +313,21 @@ static void mhi_pci_status_cb(struct mhi_controller *mhi_cntrl,
} }
} }
static void mhi_pci_wake_get_nop(struct mhi_controller *mhi_cntrl, bool force)
{
/* no-op */
}
static void mhi_pci_wake_put_nop(struct mhi_controller *mhi_cntrl, bool override)
{
/* no-op */
}
static void mhi_pci_wake_toggle_nop(struct mhi_controller *mhi_cntrl)
{
/* no-op */
}
static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl) static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl)
{ {
struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev); struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev);
@ -516,6 +531,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
mhi_cntrl->status_cb = mhi_pci_status_cb; mhi_cntrl->status_cb = mhi_pci_status_cb;
mhi_cntrl->runtime_get = mhi_pci_runtime_get; mhi_cntrl->runtime_get = mhi_pci_runtime_get;
mhi_cntrl->runtime_put = mhi_pci_runtime_put; mhi_cntrl->runtime_put = mhi_pci_runtime_put;
mhi_cntrl->wake_get = mhi_pci_wake_get_nop;
mhi_cntrl->wake_put = mhi_pci_wake_put_nop;
mhi_cntrl->wake_toggle = mhi_pci_wake_toggle_nop;
err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width)); err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width));
if (err) if (err)