forked from Minki/linux
net: mscc: ocelot: add definitions for VCAP ES0 keys, actions and target
As a preparation step for the offloading to ES0, let's create the infrastructure for talking with this hardware block. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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a61e365d7c
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@ -134,12 +134,13 @@
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<0x1280000 0x100>,
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<0x1800000 0x80000>,
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<0x1880000 0x10000>,
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<0x1040000 0x10000>,
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<0x1050000 0x10000>,
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<0x1060000 0x10000>;
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reg-names = "sys", "rew", "qs", "ptp", "port0", "port1",
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"port2", "port3", "port4", "port5", "port6",
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"port7", "port8", "port9", "port10", "qsys",
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"ana", "s1", "s2";
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"ana", "s0", "s1", "s2";
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interrupts = <18 21 22>;
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interrupt-names = "ptp_rdy", "xtr", "inj";
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@ -361,6 +361,7 @@ static const u32 *vsc9959_regmap[TARGET_MAX] = {
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[QSYS] = vsc9959_qsys_regmap,
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[REW] = vsc9959_rew_regmap,
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[SYS] = vsc9959_sys_regmap,
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[S0] = vsc9959_vcap_regmap,
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[S1] = vsc9959_vcap_regmap,
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[S2] = vsc9959_vcap_regmap,
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[PTP] = vsc9959_ptp_regmap,
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@ -395,6 +396,11 @@ static const struct resource vsc9959_target_io_res[TARGET_MAX] = {
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.end = 0x001ffff,
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.name = "sys",
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},
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[S0] = {
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.start = 0x0040000,
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.end = 0x00403ff,
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.name = "s0",
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},
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[S1] = {
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.start = 0x0050000,
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.end = 0x00503ff,
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@ -604,6 +610,38 @@ static const struct ocelot_stat_layout vsc9959_stats_layout[] = {
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{ .offset = 0x111, .name = "drop_green_prio_7", },
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};
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static const struct vcap_field vsc9959_vcap_es0_keys[] = {
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[VCAP_ES0_EGR_PORT] = { 0, 3},
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[VCAP_ES0_IGR_PORT] = { 3, 3},
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[VCAP_ES0_RSV] = { 6, 2},
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[VCAP_ES0_L2_MC] = { 8, 1},
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[VCAP_ES0_L2_BC] = { 9, 1},
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[VCAP_ES0_VID] = { 10, 12},
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[VCAP_ES0_DP] = { 22, 1},
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[VCAP_ES0_PCP] = { 23, 3},
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};
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static const struct vcap_field vsc9959_vcap_es0_actions[] = {
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[VCAP_ES0_ACT_PUSH_OUTER_TAG] = { 0, 2},
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[VCAP_ES0_ACT_PUSH_INNER_TAG] = { 2, 1},
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[VCAP_ES0_ACT_TAG_A_TPID_SEL] = { 3, 2},
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[VCAP_ES0_ACT_TAG_A_VID_SEL] = { 5, 1},
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[VCAP_ES0_ACT_TAG_A_PCP_SEL] = { 6, 2},
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[VCAP_ES0_ACT_TAG_A_DEI_SEL] = { 8, 2},
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[VCAP_ES0_ACT_TAG_B_TPID_SEL] = { 10, 2},
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[VCAP_ES0_ACT_TAG_B_VID_SEL] = { 12, 1},
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[VCAP_ES0_ACT_TAG_B_PCP_SEL] = { 13, 2},
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[VCAP_ES0_ACT_TAG_B_DEI_SEL] = { 15, 2},
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[VCAP_ES0_ACT_VID_A_VAL] = { 17, 12},
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[VCAP_ES0_ACT_PCP_A_VAL] = { 29, 3},
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[VCAP_ES0_ACT_DEI_A_VAL] = { 32, 1},
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[VCAP_ES0_ACT_VID_B_VAL] = { 33, 12},
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[VCAP_ES0_ACT_PCP_B_VAL] = { 45, 3},
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[VCAP_ES0_ACT_DEI_B_VAL] = { 48, 1},
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[VCAP_ES0_ACT_RSV] = { 49, 23},
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[VCAP_ES0_ACT_HIT_STICKY] = { 72, 1},
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};
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static const struct vcap_field vsc9959_vcap_is1_keys[] = {
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[VCAP_IS1_HK_TYPE] = { 0, 1},
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[VCAP_IS1_HK_LOOKUP] = { 1, 2},
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@ -777,6 +815,18 @@ static struct vcap_field vsc9959_vcap_is2_actions[] = {
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};
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static const struct vcap_props vsc9959_vcap_props[] = {
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[VCAP_ES0] = {
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.action_type_width = 0,
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.action_table = {
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[ES0_ACTION_TYPE_NORMAL] = {
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.width = 72, /* HIT_STICKY not included */
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.count = 1,
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},
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},
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.target = S0,
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.keys = vsc9959_vcap_es0_keys,
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.actions = vsc9959_vcap_es0_actions,
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},
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[VCAP_IS1] = {
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.action_type_width = 0,
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.action_table = {
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@ -354,6 +354,7 @@ static const u32 *vsc9953_regmap[TARGET_MAX] = {
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[QSYS] = vsc9953_qsys_regmap,
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[REW] = vsc9953_rew_regmap,
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[SYS] = vsc9953_sys_regmap,
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[S0] = vsc9953_vcap_regmap,
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[S1] = vsc9953_vcap_regmap,
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[S2] = vsc9953_vcap_regmap,
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[GCB] = vsc9953_gcb_regmap,
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@ -387,6 +388,11 @@ static const struct resource vsc9953_target_io_res[TARGET_MAX] = {
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.end = 0x001ffff,
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.name = "sys",
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},
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[S0] = {
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.start = 0x0040000,
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.end = 0x00403ff,
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.name = "s0",
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},
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[S1] = {
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.start = 0x0050000,
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.end = 0x00503ff,
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@ -607,6 +613,38 @@ static const struct ocelot_stat_layout vsc9953_stats_layout[] = {
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{ .offset = 0x91, .name = "drop_green_prio_7", },
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};
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static const struct vcap_field vsc9953_vcap_es0_keys[] = {
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[VCAP_ES0_EGR_PORT] = { 0, 4},
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[VCAP_ES0_IGR_PORT] = { 4, 4},
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[VCAP_ES0_RSV] = { 8, 2},
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[VCAP_ES0_L2_MC] = { 10, 1},
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[VCAP_ES0_L2_BC] = { 11, 1},
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[VCAP_ES0_VID] = { 12, 12},
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[VCAP_ES0_DP] = { 24, 1},
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[VCAP_ES0_PCP] = { 25, 3},
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};
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static const struct vcap_field vsc9953_vcap_es0_actions[] = {
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[VCAP_ES0_ACT_PUSH_OUTER_TAG] = { 0, 2},
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[VCAP_ES0_ACT_PUSH_INNER_TAG] = { 2, 1},
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[VCAP_ES0_ACT_TAG_A_TPID_SEL] = { 3, 2},
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[VCAP_ES0_ACT_TAG_A_VID_SEL] = { 5, 1},
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[VCAP_ES0_ACT_TAG_A_PCP_SEL] = { 6, 2},
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[VCAP_ES0_ACT_TAG_A_DEI_SEL] = { 8, 2},
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[VCAP_ES0_ACT_TAG_B_TPID_SEL] = { 10, 2},
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[VCAP_ES0_ACT_TAG_B_VID_SEL] = { 12, 1},
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[VCAP_ES0_ACT_TAG_B_PCP_SEL] = { 13, 2},
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[VCAP_ES0_ACT_TAG_B_DEI_SEL] = { 15, 2},
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[VCAP_ES0_ACT_VID_A_VAL] = { 17, 12},
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[VCAP_ES0_ACT_PCP_A_VAL] = { 29, 3},
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[VCAP_ES0_ACT_DEI_A_VAL] = { 32, 1},
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[VCAP_ES0_ACT_VID_B_VAL] = { 33, 12},
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[VCAP_ES0_ACT_PCP_B_VAL] = { 45, 3},
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[VCAP_ES0_ACT_DEI_B_VAL] = { 48, 1},
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[VCAP_ES0_ACT_RSV] = { 49, 24},
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[VCAP_ES0_ACT_HIT_STICKY] = { 73, 1},
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};
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static const struct vcap_field vsc9953_vcap_is1_keys[] = {
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[VCAP_IS1_HK_TYPE] = { 0, 1},
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[VCAP_IS1_HK_LOOKUP] = { 1, 2},
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@ -767,6 +805,18 @@ static struct vcap_field vsc9953_vcap_is2_actions[] = {
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};
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static const struct vcap_props vsc9953_vcap_props[] = {
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[VCAP_ES0] = {
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.action_type_width = 0,
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.action_table = {
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[ES0_ACTION_TYPE_NORMAL] = {
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.width = 73, /* HIT_STICKY not included */
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.count = 1,
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},
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},
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.target = S0,
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.keys = vsc9953_vcap_es0_keys,
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.actions = vsc9953_vcap_es0_actions,
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},
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[VCAP_IS1] = {
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.action_type_width = 0,
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.action_table = {
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@ -758,6 +758,38 @@ static const struct ocelot_ops ocelot_ops = {
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.wm_enc = ocelot_wm_enc,
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};
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static const struct vcap_field vsc7514_vcap_es0_keys[] = {
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[VCAP_ES0_EGR_PORT] = { 0, 4},
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[VCAP_ES0_IGR_PORT] = { 4, 4},
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[VCAP_ES0_RSV] = { 8, 2},
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[VCAP_ES0_L2_MC] = { 10, 1},
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[VCAP_ES0_L2_BC] = { 11, 1},
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[VCAP_ES0_VID] = { 12, 12},
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[VCAP_ES0_DP] = { 24, 1},
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[VCAP_ES0_PCP] = { 25, 3},
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};
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static const struct vcap_field vsc7514_vcap_es0_actions[] = {
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[VCAP_ES0_ACT_PUSH_OUTER_TAG] = { 0, 2},
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[VCAP_ES0_ACT_PUSH_INNER_TAG] = { 2, 1},
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[VCAP_ES0_ACT_TAG_A_TPID_SEL] = { 3, 2},
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[VCAP_ES0_ACT_TAG_A_VID_SEL] = { 5, 1},
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[VCAP_ES0_ACT_TAG_A_PCP_SEL] = { 6, 2},
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[VCAP_ES0_ACT_TAG_A_DEI_SEL] = { 8, 2},
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[VCAP_ES0_ACT_TAG_B_TPID_SEL] = { 10, 2},
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[VCAP_ES0_ACT_TAG_B_VID_SEL] = { 12, 1},
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[VCAP_ES0_ACT_TAG_B_PCP_SEL] = { 13, 2},
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[VCAP_ES0_ACT_TAG_B_DEI_SEL] = { 15, 2},
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[VCAP_ES0_ACT_VID_A_VAL] = { 17, 12},
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[VCAP_ES0_ACT_PCP_A_VAL] = { 29, 3},
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[VCAP_ES0_ACT_DEI_A_VAL] = { 32, 1},
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[VCAP_ES0_ACT_VID_B_VAL] = { 33, 12},
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[VCAP_ES0_ACT_PCP_B_VAL] = { 45, 3},
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[VCAP_ES0_ACT_DEI_B_VAL] = { 48, 1},
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[VCAP_ES0_ACT_RSV] = { 49, 24},
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[VCAP_ES0_ACT_HIT_STICKY] = { 73, 1},
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};
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static const struct vcap_field vsc7514_vcap_is1_keys[] = {
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[VCAP_IS1_HK_TYPE] = { 0, 1},
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[VCAP_IS1_HK_LOOKUP] = { 1, 2},
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@ -932,6 +964,18 @@ static const struct vcap_field vsc7514_vcap_is2_actions[] = {
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};
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static const struct vcap_props vsc7514_vcap_props[] = {
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[VCAP_ES0] = {
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.action_type_width = 0,
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.action_table = {
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[ES0_ACTION_TYPE_NORMAL] = {
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.width = 73, /* HIT_STICKY not included */
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.count = 1,
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},
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},
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.target = S0,
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.keys = vsc7514_vcap_es0_keys,
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.actions = vsc7514_vcap_es0_actions,
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},
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[VCAP_IS1] = {
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.action_type_width = 0,
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.action_table = {
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@ -1129,6 +1173,7 @@ static int mscc_ocelot_probe(struct platform_device *pdev)
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{ QSYS, "qsys" },
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{ ANA, "ana" },
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{ QS, "qs" },
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{ S0, "s0" },
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{ S1, "s1" },
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{ S2, "s2" },
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{ PTP, "ptp", 1 },
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@ -123,6 +123,7 @@ enum ocelot_target {
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QSYS,
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REW,
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SYS,
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S0,
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S1,
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S2,
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HSIO,
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@ -14,9 +14,9 @@
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*/
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enum {
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VCAP_ES0,
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VCAP_IS1,
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VCAP_IS2,
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/* VCAP_ES0, */
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};
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struct vcap_props {
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@ -355,4 +355,46 @@ enum vcap_is1_action_field {
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VCAP_IS1_ACT_HIT_STICKY,
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};
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/* =================================================================
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* VCAP ES0
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* =================================================================
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*/
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enum {
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ES0_ACTION_TYPE_NORMAL,
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ES0_ACTION_TYPE_MAX,
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};
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enum vcap_es0_key_field {
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VCAP_ES0_EGR_PORT,
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VCAP_ES0_IGR_PORT,
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VCAP_ES0_RSV,
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VCAP_ES0_L2_MC,
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VCAP_ES0_L2_BC,
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VCAP_ES0_VID,
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VCAP_ES0_DP,
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VCAP_ES0_PCP,
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};
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enum vcap_es0_action_field {
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VCAP_ES0_ACT_PUSH_OUTER_TAG,
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VCAP_ES0_ACT_PUSH_INNER_TAG,
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VCAP_ES0_ACT_TAG_A_TPID_SEL,
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VCAP_ES0_ACT_TAG_A_VID_SEL,
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VCAP_ES0_ACT_TAG_A_PCP_SEL,
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VCAP_ES0_ACT_TAG_A_DEI_SEL,
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VCAP_ES0_ACT_TAG_B_TPID_SEL,
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VCAP_ES0_ACT_TAG_B_VID_SEL,
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VCAP_ES0_ACT_TAG_B_PCP_SEL,
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VCAP_ES0_ACT_TAG_B_DEI_SEL,
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VCAP_ES0_ACT_VID_A_VAL,
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VCAP_ES0_ACT_PCP_A_VAL,
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VCAP_ES0_ACT_DEI_A_VAL,
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VCAP_ES0_ACT_VID_B_VAL,
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VCAP_ES0_ACT_PCP_B_VAL,
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VCAP_ES0_ACT_DEI_B_VAL,
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VCAP_ES0_ACT_RSV,
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VCAP_ES0_ACT_HIT_STICKY,
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};
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#endif /* _OCELOT_VCAP_H_ */
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