forked from Minki/linux
Staging: et131x: kill MSI type
Kill off the MSI structure Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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e266b20222
@ -132,25 +132,11 @@
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*/
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/*
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* structure for MSI Configuration reg in global address map
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* located at address 0x0030
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* MSI Configuration reg at address 0x0030
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*/
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typedef union _MSI_CONFIG_t {
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u32 value;
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struct {
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#ifdef _BIT_FIELDS_HTOL
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u32 unused1:13; /* bits 19-31 */
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u32 msi_tc:3; /* bits 16-18 */
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u32 unused2:11; /* bits 5-15 */
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u32 msi_vector:5; /* bits 0-4 */
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#else
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u32 msi_vector:5; /* bits 0-4 */
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u32 unused2:11; /* bits 5-15 */
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u32 msi_tc:3; /* bits 16-18 */
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u32 unused1:13; /* bits 19-31 */
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#endif
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} bits;
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} MSI_CONFIG_t, *PMSI_CONFIG_t;
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#define ET_MSI_VECTOR 0x0000001F
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#define ET_MSI_TC 0x00070000
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/*
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* structure for Loopback reg in global address map
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@ -188,7 +174,7 @@ typedef struct _GLOBAL_t { /* Location: */
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u32 int_status_alias; /* 0x0024 */
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u32 sw_reset; /* 0x0028 */
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u32 slv_timer; /* 0x002C */
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MSI_CONFIG_t msi_config; /* 0x0030 */
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u32 msi_config; /* 0x0030 */
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LOOPBACK_t loopback; /* 0x0034 */
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u32 watchdog_timer; /* 0x0038 */
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} GLOBAL_t, *PGLOBAL_t;
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@ -539,7 +539,7 @@ void et131x_link_detection_handler(unsigned long data)
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*/
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void ConfigGlobalRegs(struct et131x_adapter *etdev)
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{
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struct _GLOBAL_t __iomem *pGbl = &etdev->regs->global;
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struct _GLOBAL_t __iomem *regs = &etdev->regs->global;
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DBG_ENTER(et131x_dbginfo);
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@ -550,52 +550,52 @@ void ConfigGlobalRegs(struct et131x_adapter *etdev)
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* and Rx as it desires. Our default is to split it
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* 50/50:
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*/
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writel(0, &pGbl->rxq_start_addr);
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writel(PARM_RX_MEM_END_DEF, &pGbl->rxq_end_addr);
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writel(PARM_RX_MEM_END_DEF + 1, &pGbl->txq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1, &pGbl->txq_end_addr);
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writel(0, ®s->rxq_start_addr);
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writel(PARM_RX_MEM_END_DEF, ®s->rxq_end_addr);
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writel(PARM_RX_MEM_END_DEF + 1, ®s->txq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr);
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} else if (etdev->RegistryJumboPacket < 8192) {
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/* For jumbo packets > 2k but < 8k, split 50-50. */
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writel(0, &pGbl->rxq_start_addr);
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writel(INTERNAL_MEM_RX_OFFSET, &pGbl->rxq_end_addr);
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writel(INTERNAL_MEM_RX_OFFSET + 1, &pGbl->txq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1, &pGbl->txq_end_addr);
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writel(0, ®s->rxq_start_addr);
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writel(INTERNAL_MEM_RX_OFFSET, ®s->rxq_end_addr);
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writel(INTERNAL_MEM_RX_OFFSET + 1, ®s->txq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr);
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} else {
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/* 9216 is the only packet size greater than 8k that
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* is available. The Tx buffer has to be big enough
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* for one whole packet on the Tx side. We'll make
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* the Tx 9408, and give the rest to Rx
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*/
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writel(0x0000, &pGbl->rxq_start_addr);
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writel(0x01b3, &pGbl->rxq_end_addr);
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writel(0x01b4, &pGbl->txq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1,&pGbl->txq_end_addr);
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writel(0x0000, ®s->rxq_start_addr);
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writel(0x01b3, ®s->rxq_end_addr);
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writel(0x01b4, ®s->txq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1,®s->txq_end_addr);
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}
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/* Initialize the loopback register. Disable all loopbacks. */
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writel(0, &pGbl->loopback.value);
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writel(0, ®s->loopback.value);
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} else {
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/* For PHY Line loopback, the memory is configured as if Tx
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* and Rx both have all the memory. This is because the
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* RxMAC will write data into the space, and the TxMAC will
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* read it out.
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*/
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writel(0, &pGbl->rxq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1, &pGbl->rxq_end_addr);
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writel(0, &pGbl->txq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1, &pGbl->txq_end_addr);
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writel(0, ®s->rxq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1, ®s->rxq_end_addr);
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writel(0, ®s->txq_start_addr);
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writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr);
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/* Initialize the loopback register (MAC loopback). */
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writel(1, &pGbl->loopback);
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writel(1, ®s->loopback);
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}
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/* MSI Register */
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writel(0, &pGbl->msi_config.value);
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writel(0, ®s->msi_config);
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/* By default, disable the watchdog timer. It will be enabled when
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* a packet is queued.
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*/
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writel(0, &pGbl->watchdog_timer);
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writel(0, ®s->watchdog_timer);
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DBG_LEAVE(et131x_dbginfo);
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}
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