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arm64: dts: renesas: r8a77990: Fix SCIF5 DMA channels

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According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of Feb
12, 2019, the DMA channels for SCIF5 are corrected from 16..47 to 0..15
on R-Car E3.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Fixes: a5ebe5e49a ("arm64: dts: renesas: r8a77990: Add SCIF-{0,1,3,4,5} device nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Takeshi Kihara 2019-02-21 13:59:38 +01:00 committed by Simon Horman
parent 3e279a1d44
commit e20119f7ea
1 changed files with 3 additions and 4 deletions
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7
arch/arm64/boot/dts/renesas/r8a77990.dtsi
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@ -2,7 +2,7 @@
/* /*
* Device Tree Source for the R-Car E3 (R8A77990) SoC * Device Tree Source for the R-Car E3 (R8A77990) SoC
* *
* Copyright (C) 2018 Renesas Electronics Corp. * Copyright (C) 2018-2019 Renesas Electronics Corp.
*/ */
#include <dt-bindings/clock/r8a77990-cpg-mssr.h> #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
@ -1042,9 +1042,8 @@
<&cpg CPG_CORE R8A77990_CLK_S3D1C>, <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
<&scif_clk>; <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
<&dmac2 0x5b>, <&dmac2 0x5a>; dma-names = "tx", "rx";
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 202>; resets = <&cpg 202>;
status = "disabled"; status = "disabled";