forked from Minki/linux
cpufreq: Remove support for hardware P-state chips from powernow-k8
These chips are now supported by acpi-cpufreq, so we can delete all the code handling them. Andre: Tighten the deprecation warning message. Trigger load of acpi-cpufreq and let the load of the module finally fail. This avoids the problem of users ending up without any cpufreq support after the transition. Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This commit is contained in:
Matthew Garrett
Rafael J. Wysocki
parent
11269ff506
commit
e1f0b8e9b0
@ -19,7 +19,7 @@ obj-$(CONFIG_CPU_FREQ_TABLE) += freq_table.o
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# K8 systems. ACPI is preferred to all other hardware-specific drivers.
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# speedstep-* is preferred over p4-clockmod.
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obj-$(CONFIG_X86_POWERNOW_K8) += powernow-k8.o mperf.o
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obj-$(CONFIG_X86_POWERNOW_K8) += powernow-k8.o
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obj-$(CONFIG_X86_ACPI_CPUFREQ) += acpi-cpufreq.o mperf.o
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obj-$(CONFIG_X86_PCC_CPUFREQ) += pcc-cpufreq.o
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obj-$(CONFIG_X86_POWERNOW_K6) += powernow-k6.o
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@ -49,22 +49,12 @@
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#define PFX "powernow-k8: "
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#define VERSION "version 2.20.00"
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#include "powernow-k8.h"
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#include "mperf.h"
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/* serialize freq changes */
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static DEFINE_MUTEX(fidvid_mutex);
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static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
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static int cpu_family = CPU_OPTERON;
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/* array to map SW pstate number to acpi state */
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static u32 ps_to_as[8];
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/* core performance boost */
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static bool cpb_capable, cpb_enabled;
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static struct msr __percpu *msrs;
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static struct cpufreq_driver cpufreq_amd64_driver;
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#ifndef CONFIG_SMP
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@ -86,12 +76,6 @@ static u32 find_khz_freq_from_fid(u32 fid)
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return 1000 * find_freq_from_fid(fid);
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}
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static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data,
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u32 pstate)
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{
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return data[ps_to_as[pstate]].frequency;
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}
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/* Return the vco fid for an input fid
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*
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* Each "low" fid has corresponding "high" fid, and you can get to "low" fids
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@ -114,9 +98,6 @@ static int pending_bit_stuck(void)
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{
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u32 lo, hi;
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if (cpu_family == CPU_HW_PSTATE)
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return 0;
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rdmsr(MSR_FIDVID_STATUS, lo, hi);
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return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
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}
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@ -130,20 +111,6 @@ static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
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u32 lo, hi;
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u32 i = 0;
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if (cpu_family == CPU_HW_PSTATE) {
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rdmsr(MSR_PSTATE_STATUS, lo, hi);
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i = lo & HW_PSTATE_MASK;
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data->currpstate = i;
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/*
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* a workaround for family 11h erratum 311 might cause
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* an "out-of-range Pstate if the core is in Pstate-0
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*/
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if ((boot_cpu_data.x86 == 0x11) && (i >= data->numps))
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data->currpstate = HW_PSTATE_0;
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return 0;
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}
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do {
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if (i++ > 10000) {
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pr_debug("detected change pending stuck\n");
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@ -300,14 +267,6 @@ static int decrease_vid_code_by_step(struct powernow_k8_data *data,
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return 0;
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}
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/* Change hardware pstate by single MSR write */
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static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
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{
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wrmsr(MSR_PSTATE_CTRL, pstate, 0);
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data->currpstate = pstate;
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return 0;
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}
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/* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
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static int transition_fid_vid(struct powernow_k8_data *data,
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u32 reqfid, u32 reqvid)
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@ -524,8 +483,6 @@ static int core_voltage_post_transition(struct powernow_k8_data *data,
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static const struct x86_cpu_id powernow_k8_ids[] = {
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/* IO based frequency switching */
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{ X86_VENDOR_AMD, 0xf },
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/* MSR based frequency switching supported */
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X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids);
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@ -561,15 +518,8 @@ static void check_supported_cpu(void *_rc)
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"Power state transitions not supported\n");
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return;
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}
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} else { /* must be a HW Pstate capable processor */
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cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
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if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
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cpu_family = CPU_HW_PSTATE;
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else
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return;
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*rc = 0;
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}
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*rc = 0;
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}
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static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
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@ -633,18 +583,11 @@ static void print_basics(struct powernow_k8_data *data)
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for (j = 0; j < data->numps; j++) {
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if (data->powernow_table[j].frequency !=
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CPUFREQ_ENTRY_INVALID) {
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if (cpu_family == CPU_HW_PSTATE) {
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printk(KERN_INFO PFX
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" %d : pstate %d (%d MHz)\n", j,
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data->powernow_table[j].index,
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data->powernow_table[j].frequency/1000);
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} else {
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printk(KERN_INFO PFX
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"fid 0x%x (%d MHz), vid 0x%x\n",
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data->powernow_table[j].index & 0xff,
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data->powernow_table[j].frequency/1000,
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data->powernow_table[j].index >> 8);
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}
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}
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}
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if (data->batps)
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@ -652,20 +595,6 @@ static void print_basics(struct powernow_k8_data *data)
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data->batps);
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}
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static u32 freq_from_fid_did(u32 fid, u32 did)
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{
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u32 mhz = 0;
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if (boot_cpu_data.x86 == 0x10)
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mhz = (100 * (fid + 0x10)) >> did;
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else if (boot_cpu_data.x86 == 0x11)
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mhz = (100 * (fid + 8)) >> did;
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else
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BUG();
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return mhz * 1000;
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}
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static int fill_powernow_table(struct powernow_k8_data *data,
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struct pst_s *pst, u8 maxvid)
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{
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@ -825,7 +754,7 @@ static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
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{
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u64 control;
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if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
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if (!data->acpi_data.state_count)
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return;
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control = data->acpi_data.states[index].control;
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@ -876,10 +805,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
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data->numps = data->acpi_data.state_count;
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powernow_k8_acpi_pst_values(data, 0);
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if (cpu_family == CPU_HW_PSTATE)
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ret_val = fill_powernow_table_pstate(data, powernow_table);
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else
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ret_val = fill_powernow_table_fidvid(data, powernow_table);
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ret_val = fill_powernow_table_fidvid(data, powernow_table);
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if (ret_val)
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goto err_out_mem;
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@ -916,51 +842,6 @@ err_out:
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return ret_val;
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}
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static int fill_powernow_table_pstate(struct powernow_k8_data *data,
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struct cpufreq_frequency_table *powernow_table)
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{
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int i;
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u32 hi = 0, lo = 0;
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rdmsr(MSR_PSTATE_CUR_LIMIT, lo, hi);
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data->max_hw_pstate = (lo & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
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for (i = 0; i < data->acpi_data.state_count; i++) {
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u32 index;
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index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
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if (index > data->max_hw_pstate) {
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printk(KERN_ERR PFX "invalid pstate %d - "
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"bad value %d.\n", i, index);
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printk(KERN_ERR PFX "Please report to BIOS "
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"manufacturer\n");
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invalidate_entry(powernow_table, i);
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continue;
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}
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ps_to_as[index] = i;
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/* Frequency may be rounded for these */
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if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10)
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|| boot_cpu_data.x86 == 0x11) {
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rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
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if (!(hi & HW_PSTATE_VALID_MASK)) {
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pr_debug("invalid pstate %d, ignoring\n", index);
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invalidate_entry(powernow_table, i);
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continue;
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}
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powernow_table[i].frequency =
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freq_from_fid_did(lo & 0x3f, (lo >> 6) & 7);
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} else
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powernow_table[i].frequency =
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data->acpi_data.states[i].core_frequency * 1000;
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powernow_table[i].index = index;
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}
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return 0;
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}
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static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
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struct cpufreq_frequency_table *powernow_table)
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{
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@ -1037,15 +918,7 @@ static int get_transition_latency(struct powernow_k8_data *data)
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max_latency = cur_latency;
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}
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if (max_latency == 0) {
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/*
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* Fam 11h and later may return 0 as transition latency. This
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* is intended and means "very fast". While cpufreq core and
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* governors currently can handle that gracefully, better set it
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* to 1 to avoid problems in the future.
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*/
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if (boot_cpu_data.x86 < 0x11)
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printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
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"latency\n");
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pr_err(FW_WARN PFX "Invalid zero transition latency\n");
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max_latency = 1;
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}
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/* value in usecs, needs to be in nanoseconds */
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@ -1105,40 +978,6 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data,
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return res;
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}
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/* Take a frequency, and issue the hardware pstate transition command */
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static int transition_frequency_pstate(struct powernow_k8_data *data,
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unsigned int index)
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{
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u32 pstate = 0;
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int res, i;
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struct cpufreq_freqs freqs;
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pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index);
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/* get MSR index for hardware pstate transition */
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pstate = index & HW_PSTATE_MASK;
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if (pstate > data->max_hw_pstate)
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return -EINVAL;
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freqs.old = find_khz_freq_from_pstate(data->powernow_table,
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data->currpstate);
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freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
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for_each_cpu(i, data->available_cores) {
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freqs.cpu = i;
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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}
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res = transition_pstate(data, pstate);
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freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
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for_each_cpu(i, data->available_cores) {
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freqs.cpu = i;
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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}
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return res;
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}
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/* Driver entry point to switch to the target frequency */
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static int powernowk8_target(struct cpufreq_policy *pol,
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unsigned targfreq, unsigned relation)
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@ -1180,18 +1019,15 @@ static int powernowk8_target(struct cpufreq_policy *pol,
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if (query_current_values_with_pending_wait(data))
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goto err_out;
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if (cpu_family != CPU_HW_PSTATE) {
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pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
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data->currfid, data->currvid);
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pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
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data->currfid, data->currvid);
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if ((checkvid != data->currvid) ||
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(checkfid != data->currfid)) {
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printk(KERN_INFO PFX
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"error - out of sync, fix 0x%x 0x%x, "
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"vid 0x%x 0x%x\n",
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checkfid, data->currfid,
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checkvid, data->currvid);
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}
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if ((checkvid != data->currvid) ||
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(checkfid != data->currfid)) {
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pr_info(PFX
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"error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
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checkfid, data->currfid,
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checkvid, data->currvid);
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}
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if (cpufreq_frequency_table_target(pol, data->powernow_table,
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@ -1202,11 +1038,8 @@ static int powernowk8_target(struct cpufreq_policy *pol,
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powernow_k8_acpi_pst_values(data, newstate);
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if (cpu_family == CPU_HW_PSTATE)
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ret = transition_frequency_pstate(data,
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data->powernow_table[newstate].index);
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else
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ret = transition_frequency_fidvid(data, newstate);
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ret = transition_frequency_fidvid(data, newstate);
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if (ret) {
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printk(KERN_ERR PFX "transition frequency failed\n");
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ret = 1;
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@ -1215,11 +1048,7 @@ static int powernowk8_target(struct cpufreq_policy *pol,
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}
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mutex_unlock(&fidvid_mutex);
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if (cpu_family == CPU_HW_PSTATE)
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pol->cur = find_khz_freq_from_pstate(data->powernow_table,
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data->powernow_table[newstate].index);
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else
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pol->cur = find_khz_freq_from_fid(data->currfid);
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pol->cur = find_khz_freq_from_fid(data->currfid);
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ret = 0;
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err_out:
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@ -1259,8 +1088,7 @@ static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
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return;
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}
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if (cpu_family == CPU_OPTERON)
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fidvid_msr_init();
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fidvid_msr_init();
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init_on_cpu->rc = 0;
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}
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@ -1277,7 +1105,6 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
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struct powernow_k8_data *data;
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struct init_on_cpu init_on_cpu;
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int rc;
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struct cpuinfo_x86 *c = &cpu_data(pol->cpu);
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if (!cpu_online(pol->cpu))
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return -ENODEV;
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@ -1293,7 +1120,6 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
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}
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data->cpu = pol->cpu;
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data->currpstate = HW_PSTATE_INVALID;
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if (powernow_k8_cpu_init_acpi(data)) {
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/*
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@ -1330,17 +1156,10 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
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if (rc != 0)
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goto err_out_exit_acpi;
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if (cpu_family == CPU_HW_PSTATE)
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cpumask_copy(pol->cpus, cpumask_of(pol->cpu));
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else
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cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
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cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
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data->available_cores = pol->cpus;
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if (cpu_family == CPU_HW_PSTATE)
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pol->cur = find_khz_freq_from_pstate(data->powernow_table,
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data->currpstate);
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else
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pol->cur = find_khz_freq_from_fid(data->currfid);
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pol->cur = find_khz_freq_from_fid(data->currfid);
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pr_debug("policy current frequency %d kHz\n", pol->cur);
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/* min/max the cpu is capable of */
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@ -1352,18 +1171,10 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
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return -EINVAL;
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}
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/* Check for APERF/MPERF support in hardware */
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if (cpu_has(c, X86_FEATURE_APERFMPERF))
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cpufreq_amd64_driver.getavg = cpufreq_get_measured_perf;
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cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
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if (cpu_family == CPU_HW_PSTATE)
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pr_debug("cpu_init done, current pstate 0x%x\n",
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data->currpstate);
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else
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pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",
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data->currfid, data->currvid);
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pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",
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data->currfid, data->currvid);
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per_cpu(powernow_data, pol->cpu) = data;
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@ -1416,88 +1227,15 @@ static unsigned int powernowk8_get(unsigned int cpu)
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if (err)
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goto out;
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if (cpu_family == CPU_HW_PSTATE)
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khz = find_khz_freq_from_pstate(data->powernow_table,
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data->currpstate);
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else
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khz = find_khz_freq_from_fid(data->currfid);
|
||||
khz = find_khz_freq_from_fid(data->currfid);
|
||||
|
||||
|
||||
out:
|
||||
return khz;
|
||||
}
|
||||
|
||||
static void _cpb_toggle_msrs(bool t)
|
||||
{
|
||||
int cpu;
|
||||
|
||||
get_online_cpus();
|
||||
|
||||
rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
|
||||
|
||||
for_each_cpu(cpu, cpu_online_mask) {
|
||||
struct msr *reg = per_cpu_ptr(msrs, cpu);
|
||||
if (t)
|
||||
reg->l &= ~BIT(25);
|
||||
else
|
||||
reg->l |= BIT(25);
|
||||
}
|
||||
wrmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
|
||||
|
||||
put_online_cpus();
|
||||
}
|
||||
|
||||
/*
|
||||
* Switch on/off core performance boosting.
|
||||
*
|
||||
* 0=disable
|
||||
* 1=enable.
|
||||
*/
|
||||
static void cpb_toggle(bool t)
|
||||
{
|
||||
if (!cpb_capable)
|
||||
return;
|
||||
|
||||
if (t && !cpb_enabled) {
|
||||
cpb_enabled = true;
|
||||
_cpb_toggle_msrs(t);
|
||||
printk(KERN_INFO PFX "Core Boosting enabled.\n");
|
||||
} else if (!t && cpb_enabled) {
|
||||
cpb_enabled = false;
|
||||
_cpb_toggle_msrs(t);
|
||||
printk(KERN_INFO PFX "Core Boosting disabled.\n");
|
||||
}
|
||||
}
|
||||
|
||||
static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
|
||||
size_t count)
|
||||
{
|
||||
int ret = -EINVAL;
|
||||
unsigned long val = 0;
|
||||
|
||||
ret = strict_strtoul(buf, 10, &val);
|
||||
if (!ret && (val == 0 || val == 1) && cpb_capable)
|
||||
cpb_toggle(val);
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
|
||||
{
|
||||
return sprintf(buf, "%u\n", cpb_enabled);
|
||||
}
|
||||
|
||||
#define define_one_rw(_name) \
|
||||
static struct freq_attr _name = \
|
||||
__ATTR(_name, 0644, show_##_name, store_##_name)
|
||||
|
||||
define_one_rw(cpb);
|
||||
|
||||
static struct freq_attr *powernow_k8_attr[] = {
|
||||
&cpufreq_freq_attr_scaling_available_freqs,
|
||||
&cpb,
|
||||
NULL,
|
||||
};
|
||||
|
||||
@ -1513,59 +1251,21 @@ static struct cpufreq_driver cpufreq_amd64_driver = {
|
||||
.attr = powernow_k8_attr,
|
||||
};
|
||||
|
||||
/*
|
||||
* Clear the boost-disable flag on the CPU_DOWN path so that this cpu
|
||||
* cannot block the remaining ones from boosting. On the CPU_UP path we
|
||||
* simply keep the boost-disable flag in sync with the current global
|
||||
* state.
|
||||
*/
|
||||
static int cpb_notify(struct notifier_block *nb, unsigned long action,
|
||||
void *hcpu)
|
||||
{
|
||||
unsigned cpu = (long)hcpu;
|
||||
u32 lo, hi;
|
||||
|
||||
switch (action) {
|
||||
case CPU_UP_PREPARE:
|
||||
case CPU_UP_PREPARE_FROZEN:
|
||||
|
||||
if (!cpb_enabled) {
|
||||
rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
|
||||
lo |= BIT(25);
|
||||
wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
|
||||
}
|
||||
break;
|
||||
|
||||
case CPU_DOWN_PREPARE:
|
||||
case CPU_DOWN_PREPARE_FROZEN:
|
||||
rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
|
||||
lo &= ~BIT(25);
|
||||
wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static struct notifier_block cpb_nb = {
|
||||
.notifier_call = cpb_notify,
|
||||
};
|
||||
|
||||
/* driver entry point for init */
|
||||
static int __cpuinit powernowk8_init(void)
|
||||
{
|
||||
unsigned int i, supported_cpus = 0, cpu;
|
||||
unsigned int i, supported_cpus = 0;
|
||||
int rv;
|
||||
|
||||
if (static_cpu_has(X86_FEATURE_HW_PSTATE)) {
|
||||
pr_warn(PFX "this CPU is not supported anymore, using acpi-cpufreq instead.\n");
|
||||
request_module("acpi-cpufreq");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!x86_match_cpu(powernow_k8_ids))
|
||||
return -ENODEV;
|
||||
|
||||
if (static_cpu_has(X86_FEATURE_HW_PSTATE))
|
||||
pr_warn(PFX "support for this CPU is deprecated, use acpi-cpufreq instead.\n");
|
||||
|
||||
for_each_online_cpu(i) {
|
||||
int rc;
|
||||
smp_call_function_single(i, check_supported_cpu, &rc, 1);
|
||||
@ -1576,26 +1276,6 @@ static int __cpuinit powernowk8_init(void)
|
||||
if (supported_cpus != num_online_cpus())
|
||||
return -ENODEV;
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_CPB)) {
|
||||
|
||||
cpb_capable = true;
|
||||
|
||||
msrs = msrs_alloc();
|
||||
if (!msrs) {
|
||||
printk(KERN_ERR "%s: Error allocating msrs!\n", __func__);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
register_cpu_notifier(&cpb_nb);
|
||||
|
||||
rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
|
||||
|
||||
for_each_cpu(cpu, cpu_online_mask) {
|
||||
struct msr *reg = per_cpu_ptr(msrs, cpu);
|
||||
cpb_enabled |= !(!!(reg->l & BIT(25)));
|
||||
}
|
||||
}
|
||||
|
||||
rv = cpufreq_register_driver(&cpufreq_amd64_driver);
|
||||
|
||||
if (!rv)
|
||||
@ -1603,15 +1283,6 @@ static int __cpuinit powernowk8_init(void)
|
||||
num_online_nodes(), boot_cpu_data.x86_model_id,
|
||||
supported_cpus);
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_CPB)) {
|
||||
if (rv < 0) {
|
||||
unregister_cpu_notifier(&cpb_nb);
|
||||
msrs_free(msrs);
|
||||
msrs = NULL;
|
||||
} else
|
||||
pr_info(PFX "Core Performance Boosting: %s.\n",
|
||||
(cpb_enabled ? "on" : "off"));
|
||||
}
|
||||
return rv;
|
||||
}
|
||||
|
||||
@ -1620,13 +1291,6 @@ static void __exit powernowk8_exit(void)
|
||||
{
|
||||
pr_debug("exit\n");
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_CPB)) {
|
||||
msrs_free(msrs);
|
||||
msrs = NULL;
|
||||
|
||||
unregister_cpu_notifier(&cpb_nb);
|
||||
}
|
||||
|
||||
cpufreq_unregister_driver(&cpufreq_amd64_driver);
|
||||
}
|
||||
|
||||
|
||||
@ -5,24 +5,11 @@
|
||||
* http://www.gnu.org/licenses/gpl.html
|
||||
*/
|
||||
|
||||
enum pstate {
|
||||
HW_PSTATE_INVALID = 0xff,
|
||||
HW_PSTATE_0 = 0,
|
||||
HW_PSTATE_1 = 1,
|
||||
HW_PSTATE_2 = 2,
|
||||
HW_PSTATE_3 = 3,
|
||||
HW_PSTATE_4 = 4,
|
||||
HW_PSTATE_5 = 5,
|
||||
HW_PSTATE_6 = 6,
|
||||
HW_PSTATE_7 = 7,
|
||||
};
|
||||
|
||||
struct powernow_k8_data {
|
||||
unsigned int cpu;
|
||||
|
||||
u32 numps; /* number of p-states */
|
||||
u32 batps; /* number of p-states supported on battery */
|
||||
u32 max_hw_pstate; /* maximum legal hardware pstate */
|
||||
|
||||
/* these values are constant when the PSB is used to determine
|
||||
* vid/fid pairings, but are modified during the ->target() call
|
||||
@ -37,7 +24,6 @@ struct powernow_k8_data {
|
||||
/* keep track of the current fid / vid or pstate */
|
||||
u32 currvid;
|
||||
u32 currfid;
|
||||
enum pstate currpstate;
|
||||
|
||||
/* the powernow_table includes all frequency and vid/fid pairings:
|
||||
* fid are the lower 8 bits of the index, vid are the upper 8 bits.
|
||||
@ -97,23 +83,6 @@ struct powernow_k8_data {
|
||||
#define MSR_S_HI_CURRENT_VID 0x0000003f
|
||||
#define MSR_C_HI_STP_GNT_BENIGN 0x00000001
|
||||
|
||||
|
||||
/* Hardware Pstate _PSS and MSR definitions */
|
||||
#define USE_HW_PSTATE 0x00000080
|
||||
#define HW_PSTATE_MASK 0x00000007
|
||||
#define HW_PSTATE_VALID_MASK 0x80000000
|
||||
#define HW_PSTATE_MAX_MASK 0x000000f0
|
||||
#define HW_PSTATE_MAX_SHIFT 4
|
||||
#define MSR_PSTATE_DEF_BASE 0xc0010064 /* base of Pstate MSRs */
|
||||
#define MSR_PSTATE_STATUS 0xc0010063 /* Pstate Status MSR */
|
||||
#define MSR_PSTATE_CTRL 0xc0010062 /* Pstate control MSR */
|
||||
#define MSR_PSTATE_CUR_LIMIT 0xc0010061 /* pstate current limit MSR */
|
||||
|
||||
/* define the two driver architectures */
|
||||
#define CPU_OPTERON 0
|
||||
#define CPU_HW_PSTATE 1
|
||||
|
||||
|
||||
/*
|
||||
* There are restrictions frequencies have to follow:
|
||||
* - only 1 entry in the low fid table ( <=1.4GHz )
|
||||
@ -218,5 +187,4 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid);
|
||||
|
||||
static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index);
|
||||
|
||||
static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
|
||||
static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user